aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB.c
diff options
context:
space:
mode:
authorHuayang Duan <huayang.duan@mediatek.com>2020-06-03 14:03:25 +0800
committerHung-Te Lin <hungte@chromium.org>2020-08-06 03:03:25 +0000
commitd4eb14aa3c91406db5db41cc7ac60f8196f150f2 (patch)
tree5492acce781bddbca82fd3ded12a3985f9a62179 /src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB.c
parent0e6cb83abb7a6892a2ca371baa14a3654ad49e24 (diff)
mb/google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup
Set correct DDR geometry for all existing memory modules. BUG=none BRANCH=kukui TEST=Boots correctly on Kukui Change-Id: I9b53ab2bf43e0dfb7448eb37a18faf686267eaed Signed-off-by: Huayang Duan <huayang.duan@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42035 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB.c')
-rw-r--r--src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB.c b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB.c
index e95df6c613..1734797042 100644
--- a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB.c
+++ b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB.c
@@ -1,10 +1,11 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-#include <soc/emi.h>
+#include <soc/dramc_param.h>
struct sdram_params params = {
.source = DRAMC_PARAM_SOURCE_SDRAM_CONFIG,
.frequency = 1600,
+ .ddr_geometry = DDR_TYPE_2CH_2RK_4GB_2_2,
.wr_level = {
[CHANNEL_A] = { {0x22, 0x1C}, {0x23, 0x1D} },
[CHANNEL_B] = { {0x26, 0x23}, {0x26, 0x23} }