diff options
| author | Tristan Shieh <tristan.shieh@mediatek.com> | 2018-10-19 17:29:23 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-12-05 13:35:59 +0000 |
| commit | 0688ab8d95f18f718510cc17aeb01a47519a9a5a (patch) | |
| tree | 05fcd7af442ef1f32e85b34d1cdf5ac25371d434 /src/mainboard/google/kukui/chromeos.c | |
| parent | 3a065f1a76feb4f23af6708caef5f912292610fd (diff) | |
google/kukui: Support TPM
Init SPI bus 0 to connect TPM, configure interrupt type of GPIO CR50_IRQ,
implement tis_plat_irq_status(), and set up chromeos GPIO table for TPM
interrupt.
BUG=b:80501386
BRANCH=none
Test=Boots correctly on Kukui.
Change-Id: Ieaa6ae65fbfb5ab6323e226e8171dd7a992c3a39
Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/29192
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/mainboard/google/kukui/chromeos.c')
| -rw-r--r-- | src/mainboard/google/kukui/chromeos.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/mainboard/google/kukui/chromeos.c b/src/mainboard/google/kukui/chromeos.c index ace99bc11e..77c442f36a 100644 --- a/src/mainboard/google/kukui/chromeos.c +++ b/src/mainboard/google/kukui/chromeos.c @@ -16,6 +16,7 @@ #include <bootmode.h> #include <boot/coreboot_tables.h> #include <gpio.h> +#include <security/tpm/tis.h> #include "gpio.h" @@ -31,6 +32,7 @@ void fill_lb_gpios(struct lb_gpios *gpios) {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {EC_IN_RW.id, ACTIVE_HIGH, -1, "EC in RW"}, {EC_IRQ.id, ACTIVE_LOW, -1, "EC interrupt"}, + {CR50_IRQ.id, ACTIVE_HIGH, -1, "TPM interrupt"}, }; lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); } @@ -39,3 +41,8 @@ int get_write_protect_state(void) { return 0; } + +int tis_plat_irq_status(void) +{ + return gpio_eint_poll(CR50_IRQ); +} |