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| author | Tristan Shieh <tristan.shieh@mediatek.com> | 2018-10-12 13:27:15 +0800 |
|---|---|---|
| committer | Julius Werner <jwerner@chromium.org> | 2018-11-02 19:57:55 +0000 |
| commit | 42adb29853215576a5b331b2126d867f3d56bf9f (patch) | |
| tree | 71a7d5de2009d02daefe7e91f02751b6c46bb2cb /src/mainboard/google/kukui/Makefile.inc | |
| parent | 96631f941dc3e958585cc4798d3c7c74c032c7bd (diff) | |
google/kukui: Add board id support
Get board id from AUXIN4 and RAM code from AUXIN3.
BUG=b:80501386
BRANCH=none
TEST=AUXIN4 is 0.074v and AUXIN3 is 0.212v on P0.
AUXIN4 is 0.212v and AUXIN3 is 0.212v on P1.
Change-Id: I50533e851d2fae66ae8c5e4e1aa36708d9058e94
Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com>
Reviewed-on: https://review.coreboot.org/29062
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/mainboard/google/kukui/Makefile.inc')
| -rw-r--r-- | src/mainboard/google/kukui/Makefile.inc | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/kukui/Makefile.inc b/src/mainboard/google/kukui/Makefile.inc index aa6bf11812..a98541a35c 100644 --- a/src/mainboard/google/kukui/Makefile.inc +++ b/src/mainboard/google/kukui/Makefile.inc @@ -1,3 +1,4 @@ +bootblock-y += boardid.c bootblock-y += bootblock.c bootblock-y += chromeos.c bootblock-y += memlayout.ld @@ -6,10 +7,12 @@ decompressor-y += memlayout.ld verstage-y += chromeos.c verstage-y += memlayout.ld +romstage-y += boardid.c romstage-y += chromeos.c romstage-y += memlayout.ld romstage-y += romstage.c +ramstage-y += boardid.c ramstage-y += chromeos.c ramstage-y += mainboard.c ramstage-y += memlayout.ld |