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authorFelix Held <felix-coreboot@felixheld.de>2021-12-17 18:51:21 +0100
committerFelix Held <felix-coreboot@felixheld.de>2021-12-20 09:50:57 +0000
commit907cc5ab01a1c578392e4d8404d763467e591a5e (patch)
tree841059f087705c77ff449c119ed2afa5c4e67e40 /src/mainboard/google/kahlee
parent1a811bcb3bdff68a5bc27d17557108f4259af93b (diff)
mb/amd/gardenia,padmelon;mb/google/kahlee: use full path of SoC's chip.h
This is taken from CB:41355 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I10a18efb92ac0c3cad31044156e32aa6afe1d4d1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60198 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/google/kahlee')
-rw-r--r--src/mainboard/google/kahlee/OemCustomize.c2
-rw-r--r--src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/kahlee/OemCustomize.c b/src/mainboard/google/kahlee/OemCustomize.c
index 349fe34068..9f37a460d8 100644
--- a/src/mainboard/google/kahlee/OemCustomize.c
+++ b/src/mainboard/google/kahlee/OemCustomize.c
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-#include <chip.h>
+#include <soc/amd/stoneyridge/chip.h>
#include <amdblocks/agesawrapper.h>
#include <gpio.h>
#include <console/console.h>
diff --git a/src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c b/src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c
index 79fd4784af..a3dfa15e93 100644
--- a/src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c
+++ b/src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c
@@ -2,7 +2,7 @@
#include <amdblocks/agesawrapper.h>
#include <variant/gpio.h>
-#include <chip.h>
+#include <soc/amd/stoneyridge/chip.h>
#include <soc/pci_devs.h>
static const PCIe_PORT_DESCRIPTOR PortList[] = {