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authorMarc Jones <marcj303@gmail.com>2017-11-16 18:53:47 -0700
committerMarc Jones <marc@marcjonesconsulting.com>2017-11-29 22:36:49 +0000
commitfede56bf811972cd16e5b36c39c819b88fa74941 (patch)
tree9960a12050a0fde834ff3fdce0844b85e337c711 /src/mainboard/google/kahlee/variants/baseboard/memory.c
parent71f7f0a8f82ffb6273f2f6589bee42b9916bcc35 (diff)
google/kahlee: Add SPD function
Add the mainboard_spd_read function in romstage and call the variants function. Grunt is the baseboard and has soldered down memory, so add it for the default weak SPD functions and build the SPDs in cbfs. Kahlee overrides the weak SPD function and falls back to the soc I2C SPD functions. BUG=b:67845441 TEST=Build and boot Kahlee. Change-Id: I789002bfadc1a2b24f9046708986d29c0e2daf33 Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: https://review.coreboot.org/22486 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/mainboard/google/kahlee/variants/baseboard/memory.c')
-rw-r--r--src/mainboard/google/kahlee/variants/baseboard/memory.c31
1 files changed, 30 insertions, 1 deletions
diff --git a/src/mainboard/google/kahlee/variants/baseboard/memory.c b/src/mainboard/google/kahlee/variants/baseboard/memory.c
index daa5ef9160..b8ec917633 100644
--- a/src/mainboard/google/kahlee/variants/baseboard/memory.c
+++ b/src/mainboard/google/kahlee/variants/baseboard/memory.c
@@ -13,9 +13,12 @@
* GNU General Public License for more details.
*/
-#include <gpio.h> /* src/include/gpio.h */
#include <baseboard/variants.h>
+#include <console/console.h>
+#include <gpio.h> /* src/include/gpio.h */
+#include <spd_bin.h>
#include <variant/gpio.h>
+#include <amdblocks/dimm_spd.h>
uint8_t __attribute__((weak)) variant_memory_sku(void)
{
@@ -28,3 +31,29 @@ uint8_t __attribute__((weak)) variant_memory_sku(void)
return gpio_base2_value(pads, ARRAY_SIZE(pads));
}
+
+int __attribute__((weak)) variant_mainboard_read_spd(uint8_t spdAddress,
+ char *buf, size_t len)
+{
+ struct region_device spd_rdev;
+ u8 spd_index = variant_memory_sku();
+
+ printk(BIOS_INFO, "%s SPD index %d\n", __func__, spd_index);
+
+ if (get_spd_cbfs_rdev(&spd_rdev, spd_index) < 0) {
+ printk(BIOS_ERR, "Error: spd.bin not found\n");
+ return -1;
+ }
+
+ if (len != region_device_sz(&spd_rdev)) {
+ printk(BIOS_ERR, "Error: spd.bin is not the correct size\n");
+ return -1;
+ }
+
+ if (rdev_readat(&spd_rdev, buf, 0, len) != len) {
+ printk(BIOS_ERR, "Error: couldn't read spd.bin\n");
+ return -1;
+ }
+
+ return 0;
+}