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authorMarc Jones <marcj303@gmail.com>2017-11-02 11:36:53 -0600
committerMarc Jones <marc@marcjonesconsulting.com>2017-11-15 18:19:31 +0000
commit067031e0e195c4346255680821ff288b407e0b90 (patch)
treef5eaf61b5d113908d4eb331378cdbcce64b74c94 /src/mainboard/google/kahlee/mainboard.c
parentc8999a7c43e85365224e32a81364f68cb89d8975 (diff)
variants/kahlee: Add thermal ASL
Connect the EC thermal to Kahlee and Grunt thermal ASL. Intialize GNVS thermal values in the mainboard finalize. BUG=b:67999819 Change-Id: I89159a5fd3c639e511139b8c5948b6a4ee19aaa3 Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: https://review.coreboot.org/22400 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/mainboard/google/kahlee/mainboard.c')
-rw-r--r--src/mainboard/google/kahlee/mainboard.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/src/mainboard/google/kahlee/mainboard.c b/src/mainboard/google/kahlee/mainboard.c
index 9c3f4ad666..e21aa02080 100644
--- a/src/mainboard/google/kahlee/mainboard.c
+++ b/src/mainboard/google/kahlee/mainboard.c
@@ -18,9 +18,12 @@
#include <arch/acpi.h>
#include <agesawrapper.h>
#include <amd_pci_util.h>
+#include <cbmem.h>
#include <ec.h>
#include <baseboard/variants.h>
+#include <soc/nvs.h>
#include <soc/smi.h>
+#include <variant/thermal.h>
#include <vendorcode/google/chromeos/chromeos.h>
/***********************************************************
@@ -104,7 +107,22 @@ static void kahlee_enable(device_t dev)
dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator;
}
+
+static void mainboard_final(void *chip_info)
+{
+ struct global_nvs_t *gnvs;
+
+ gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
+
+ if (gnvs) {
+ gnvs->tmps = CTL_TDP_SENSOR_ID;
+ gnvs->tcrt = CRITICAL_TEMPERATURE;
+ gnvs->tpsv = PASSIVE_TEMPERATURE;
+ }
+}
+
struct chip_operations mainboard_ops = {
.init = mainboard_init,
.enable_dev = kahlee_enable,
+ .final = mainboard_final,
};