diff options
| author | Marc Jones <marcj303@gmail.com> | 2018-01-11 16:43:06 -0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-01-13 23:44:02 +0000 |
| commit | 5fb261303886836f6a0fe06d54fe6a2b9af4f07b (patch) | |
| tree | 4320ffb0f04548455eb0eb2f377af083f135df15 /src/mainboard/google/kahlee/dsdt.asl | |
| parent | dc512f893f61e731504d6867f40de502acfd66ed (diff) | |
google/kahlee/grunt: Move ASL to variants
Move the apci/ to the baseboard and move mainboard.asl to
each variant.
BUG=b:71873651
TEST=build
BRANCH=none
Change-Id: I8a829f2946e4b280cd78574eb8dbda6c2a9a1028
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/23229
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Diffstat (limited to 'src/mainboard/google/kahlee/dsdt.asl')
| -rw-r--r-- | src/mainboard/google/kahlee/dsdt.asl | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/google/kahlee/dsdt.asl b/src/mainboard/google/kahlee/dsdt.asl index ff3bb7371c..2237876081 100644 --- a/src/mainboard/google/kahlee/dsdt.asl +++ b/src/mainboard/google/kahlee/dsdt.asl @@ -31,7 +31,7 @@ DefinitionBlock ( #include <globalnvs.asl> /* Globals for the platform */ - #include "acpi/mainboard.asl" + #include <variant/acpi/mainboard.asl> /* PCI IRQ mapping for the Southbridge */ #include <pcie.asl> @@ -43,7 +43,7 @@ DefinitionBlock ( #include <sleepstates.asl> /* Contains the Sleep methods (WAK, PTS, GTS, etc.) */ - #include "acpi/sleep.asl" + #include <variant/acpi/sleep.asl> /* System Bus */ Scope(\_SB) { /* Start \_SB scope */ @@ -51,7 +51,7 @@ DefinitionBlock ( #include <arch/x86/acpi/globutil.asl> /* IRQ Routing mapping for this platform (in \_SB scope) */ - #include "acpi/routing.asl" + #include <variant/acpi/routing.asl> Device(PWRB) { Name(_HID, EISAID("PNP0C0C")) @@ -64,7 +64,7 @@ DefinitionBlock ( } /* End \_SB scope */ /* Thermal handler */ - #include "acpi/thermal.asl" + #include <variant/acpi/thermal.asl> /* Chrome OS specific */ #include <vendorcode/google/chromeos/acpi/chromeos.asl> @@ -82,6 +82,6 @@ DefinitionBlock ( #include <smbus.asl> /* Define the General Purpose Events for the platform */ - #include "acpi/gpe.asl" + #include <variant/acpi/gpe.asl> } /* End of ASL file */ |