diff options
author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2017-05-23 18:57:47 -0600 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2017-07-27 21:32:55 +0000 |
commit | beb12880a13fabe0a180600424f75402642087be (patch) | |
tree | baf104a5958a8a97a03e056163ac0f77bf043f0c /src/mainboard/google/kahlee/chromeos.fmd | |
parent | ee193362ad6b80d5a3b9823f4840c7c134a239c6 (diff) |
google/kahlee: Add ChromeOS and ChromeEC
Add the basics for building as a ChromeOS device. ChromeOS
and ChromeEC are dependent on each other, so bring them in
together. The EC is a Nuvoton and you can find additional
details in the Chromium EC repo.
Add the Google HWID "Kahlee TEST 6421".
The chromeos.fmd for Kahlee takes advantage of the AGESA
located outside cbfs and includes typical RW, VPD, and
MRC areas.
There are some updates required to depthcharge, vboot, GPIOs,
and the ChromeEC before we have a complete-ish system.
Change-Id: Ifb0a6afc01dd80ef9e7bb81039d9152936043999
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/19835
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/google/kahlee/chromeos.fmd')
-rw-r--r-- | src/mainboard/google/kahlee/chromeos.fmd | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/src/mainboard/google/kahlee/chromeos.fmd b/src/mainboard/google/kahlee/chromeos.fmd new file mode 100644 index 0000000000..52aa37e84e --- /dev/null +++ b/src/mainboard/google/kahlee/chromeos.fmd @@ -0,0 +1,36 @@ +FLASH@0xff800000 0x800000 { +SI_ALL@0x0 0xCB000 { + UNUSED@0x00000 0x20000 + AMD_FW@0x20000 0xAB000 + } +SI_BIOS@0xCB000 0x735000 { + RW_SECTION_A@0x0 0x21e000 { + VBLOCK_A@0x0 0x10000 + FW_MAIN_A(CBFS)@0x10000 0x20DFC0 + RW_FWID_A@0x21dfc0 0x40 + } + RW_SECTION_B@0x21e000 0x21e000 { + VBLOCK_B@0x0 0x10000 + FW_MAIN_B(CBFS)@0x10000 0x20DFC0 + RW_FWID_B@0x21dfc0 0x40 + } + RW_MRC_CACHE@0x43C000 0x10000 + RW_ELOG@0x44C000 0x4000 + RW_SHARED@0x450000 0x4000 { + SHARED_DATA@0x0 0x2000 + VBLOCK_DEV@0x2000 0x2000 + } + RW_VPD@0x454000 0x2000 + RW_UNUSED@0x456000 0x4F000 +# RW_LEGACY(CBFS)@0x200000 0x200000 + WP_RO@0x4A5000 0x290000 { + RO_SECTION@0x00000 0x290000 { + FMAP@0x0 0x800 + RO_FRID@0x800 0x40 + RO_FRID_PAD@0x840 0x7c0 + GBB@0x1000 0x70000 + COREBOOT(CBFS)@0x80000 0x210000 + } + } + } +} |