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authorMarc Jones <marcj303@gmail.com>2017-05-22 21:35:16 -0600
committerMartin Roth <martinroth@google.com>2017-07-27 21:31:32 +0000
commit2d79f16dc81037620ead4e3b49eb470726aec3f2 (patch)
treeb19cf32c5c2ac9d7104231953cb76ba71f8d981d /src/mainboard/google/kahlee/acpi_tables.c
parentb14e04bd7c492a551532dc3678a1cc922b3cedf8 (diff)
google/kahlee: Start Kahlee mainboard
Copied from amd/gardenia. Update the appropriate board name strings. Uses the soc/ structure. Change-Id: Ia68b16969518f4d63d5d2dea7658a472b2daca05 Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: https://review.coreboot.org/19830 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/google/kahlee/acpi_tables.c')
-rw-r--r--src/mainboard/google/kahlee/acpi_tables.c59
1 files changed, 59 insertions, 0 deletions
diff --git a/src/mainboard/google/kahlee/acpi_tables.c b/src/mainboard/google/kahlee/acpi_tables.c
new file mode 100644
index 0000000000..f55d9cea8d
--- /dev/null
+++ b/src/mainboard/google/kahlee/acpi_tables.c
@@ -0,0 +1,59 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <agesawrapper.h>
+
+#include <console/console.h>
+#include <string.h>
+#include <arch/acpi.h>
+#include <arch/acpigen.h>
+#include <arch/ioapic.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <cpu/x86/msr.h>
+#include <cpu/amd/mtrr.h>
+#include <cpu/amd/amdfam16.h>
+
+#define IO_APIC2_ADDR 0xFEC20000
+
+unsigned long acpi_fill_madt(unsigned long current)
+{
+ /* create all subtables for processors */
+ current = acpi_create_madt_lapics(current);
+
+ /* Write Kern IOAPIC, only one */
+ current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current,
+ CONFIG_MAX_CPUS, IO_APIC_ADDR, 0);
+
+ /* TODO: Remove the hardcode */
+ current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current,
+ CONFIG_MAX_CPUS+1, IO_APIC2_ADDR, 24);
+
+ current += acpi_create_madt_irqoverride(
+ (acpi_madt_irqoverride_t *)current, 0, 0, 2, 0);
+ current += acpi_create_madt_irqoverride(
+ (acpi_madt_irqoverride_t *)current, 0, 9, 9, 0xF);
+ /* 0: mean bus 0--->ISA */
+ /* 0: PIC 0 */
+ /* 2: APIC 2 */
+ /* 5 mean: 0101 --> Edge-triggered, Active high */
+
+ /* create all subtables for processors */
+ current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current,
+ 0xff, 5, 1);
+ /* 1: LINT1 connect to NMI */
+
+ return current;
+}