Combine Broadwell Chromeboxes using variant board scheme

Combine existing boards google/guado, rikku, and tidus using
their common reference board google/jecht as a base.

Additional changes besides simple consolidation include:
 - simplify power LED functions
 - simplify HDA verb definitions using azelia macros
 - use common SoC functions to generate FADT table
 - correct FADT table header version
 - remove unused haswell_pci_irqs.asl
 - remove unused header includes (various)
 - set sane default fan speed (0x4d) for all variants

Variant setup modeled after google/beltino

Change-Id: I77a2dffe9601734916a33fd04ead98016ad0bc4b
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/17913
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>

1 files changed, 8 insertions, 0 deletions

diff --git a/src/mainboard/google/jecht/smihandler.c b/src/mainboard/google/jecht/smihandler.c
index 3b47ac6454..8243354299 100644
--- a/src/mainboard/google/jecht/smihandler.c
+++ b/src/mainboard/google/jecht/smihandler.c
@@ -27,6 +27,7 @@
 #include <soc/nvs.h>
 #include <soc/pm.h>
 #include <soc/smm.h>
+#include "onboard.h"
 
 int mainboard_io_trap_handler(int smif)
 {
@@ -58,8 +59,15 @@ void mainboard_smi_sleep(u8 slp_typ)
 	/* Disable USB charging if required */
 	switch (slp_typ) {
 	case ACPI_S3:
+		set_power_led(LED_BLINK);
+
+		/* Enable DCP mode */
+		if (IS_ENABLED(CONFIG_BOARD_GOOGLE_TIDUS)) {
+			set_gpio(GPIO_USB_CTL_1, 0);
+		}
 		break;
 	case ACPI_S5:
+		set_power_led(LED_OFF);
 		break;
 	}
 }