diff options
author | Patrick Georgi <pgeorgi@chromium.org> | 2015-06-05 18:53:43 +0200 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2015-06-09 14:28:38 +0200 |
commit | 04746fc22c667506da528394ca6764656b05657e (patch) | |
tree | 5733c63efe1fa4ac82d01e15004035e5d5d05961 /src/mainboard/google/jecht/onboard.h | |
parent | aa04e18409805ad57eeb8d723744e237743ee0b4 (diff) |
google/jecht: add new mainboard
Taken from CrOS, including everything up to commit da4c33913.
Adapted to upstream.
Change-Id: I095e6726a220200ba17719fc05fcdc521da484e8
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10432
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/jecht/onboard.h')
-rw-r--r-- | src/mainboard/google/jecht/onboard.h | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/src/mainboard/google/jecht/onboard.h b/src/mainboard/google/jecht/onboard.h new file mode 100644 index 0000000000..d0f78449aa --- /dev/null +++ b/src/mainboard/google/jecht/onboard.h @@ -0,0 +1,40 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +#ifndef ONBOARD_H +#define ONBOARD_H + +#ifndef __ACPI__ +void lan_init(void); +#endif + +/* defines for programming the MAC address */ +#define JECHT_NIC_VENDOR_ID 0x10EC +#define JECHT_NIC_DEVICE_ID 0x8168 + +/* 0x00: White LINK LED and Amber ACTIVE LED */ +#define JECHT_NIC_LED_MODE 0x00 + +/* NIC wake is GPIO 8 */ +#define JECHT_NIC_WAKE_GPIO 8 + +/* WLAN wake is GPIO 10 */ +#define JECHT_WLAN_WAKE_GPIO 10 + +#endif |