Combine Broadwell Chromeboxes using variant board scheme

Combine existing boards google/guado, rikku, and tidus using
their common reference board google/jecht as a base.

Additional changes besides simple consolidation include:
 - simplify power LED functions
 - simplify HDA verb definitions using azelia macros
 - use common SoC functions to generate FADT table
 - correct FADT table header version
 - remove unused haswell_pci_irqs.asl
 - remove unused header includes (various)
 - set sane default fan speed (0x4d) for all variants

Variant setup modeled after google/beltino

Change-Id: I77a2dffe9601734916a33fd04ead98016ad0bc4b
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/17913
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>

4 files changed, 11 insertions, 440 deletions

diff --git a/src/mainboard/google/jecht/acpi/haswell_pci_irqs.asl b/src/mainboard/google/jecht/acpi/haswell_pci_irqs.asl
deleted file mode 100644
index 40658a9839..0000000000
--- a/src/mainboard/google/jecht/acpi/haswell_pci_irqs.asl
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/* This is board specific information: IRQ routing for IvyBridge */
-
-// PCI Interrupt Routing
-Method(_PRT)
-{
-	If (PICM) {
-		Return (Package() {
-			// Onboard graphics (IGD)	0:2.0
-			Package() { 0x0002ffff, 0, 0, 16 },
-			// Mini-HD Audio		0:3.0
-			Package() { 0x0003ffff, 0, 0, 16 },
-			// High Definition Audio	0:1b.0
-			Package() { 0x001bffff, 0, 0, 22 },
-			// PCIe Root Ports		0:1c.x
-			Package() { 0x001cffff, 0, 0, 16 },
-			Package() { 0x001cffff, 1, 0, 17 },
-			Package() { 0x001cffff, 2, 0, 18 },
-			Package() { 0x001cffff, 3, 0, 19 },
-			// EHCI	  			0:1d.0
-			Package() { 0x001dffff, 0, 0, 19 },
-			// XHCI	  			0:14.0
-			Package() { 0x0014ffff, 0, 0, 18 },
-			// LPC devices			0:1f.0
-			Package() { 0x001fffff, 0, 0, 22 },
-			Package() { 0x001fffff, 1, 0, 18 },
-			Package() { 0x001fffff, 2, 0, 17 },
-			Package() { 0x001fffff, 3, 0, 16 },
-			// Serial IO                    0:15.0
-			Package() { 0x0015ffff, 0, 0, 20 },
-			Package() { 0x0015ffff, 1, 0, 21 },
-			Package() { 0x0015ffff, 2, 0, 21 },
-			Package() { 0x0015ffff, 3, 0, 21 },
-			// SDIO                         0:17.0
-			Package() { 0x0017ffff, 0, 0, 23 },
-		})
-	} Else {
-		Return (Package() {
-			// Onboard graphics (IGD)	0:2.0
-			Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
-			// Mini-HD Audio		0:3.0
-			Package() { 0x0003ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
-			// High Definition Audio	0:1b.0
-			Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKG, 0 },
-			// PCIe Root Ports		0:1c.x
-			Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
-			Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },
-			Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },
-			Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },
-			// EHCI	  			0:1d.0
-			Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKD, 0 },
-			// XHCI	  			0:14.0
-			Package() { 0x0014ffff, 0, \_SB.PCI0.LPCB.LNKC, 0 },
-			// LPC device			0:1f.0
-			Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKG, 0 },
-			Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKC, 0 },
-			Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKB, 0 },
-			Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKA, 0 },
-			// Serial IO                    0:15.0
-			Package() { 0x0015ffff, 0, \_SB.PCI0.LPCB.LNKE, 0 },
-			Package() { 0x0015ffff, 1, \_SB.PCI0.LPCB.LNKF, 0 },
-			Package() { 0x0015ffff, 2, \_SB.PCI0.LPCB.LNKF, 0 },
-			Package() { 0x0015ffff, 3, \_SB.PCI0.LPCB.LNKF, 0 },
-			// SDIO                         0:17.0
-			Package() { 0x0017ffff, 0, \_SB.PCI0.LPCB.LNKH, 0 },
-		})
-	}
-}
diff --git a/src/mainboard/google/jecht/acpi/mainboard.asl b/src/mainboard/google/jecht/acpi/mainboard.asl
index b06944617b..16e63529d1 100644
--- a/src/mainboard/google/jecht/acpi/mainboard.asl
+++ b/src/mainboard/google/jecht/acpi/mainboard.asl
@@ -25,14 +25,6 @@ Scope (\_SB)
 }
 
 /*
- * LPC Trusted Platform Module
- */
-Scope (\_SB.PCI0.LPCB)
-{
-	#include <drivers/pc80/tpm/acpi/tpm.asl>
-}
-
-/*
  * LAN connected to Root Port 3, becomes Root Port 1 after coalesce
  */
 Scope (\_SB.PCI0.RP01)
diff --git a/src/mainboard/google/jecht/acpi/superio.asl b/src/mainboard/google/jecht/acpi/superio.asl
index 9b71632db8..1d3779216e 100644
--- a/src/mainboard/google/jecht/acpi/superio.asl
+++ b/src/mainboard/google/jecht/acpi/superio.asl
@@ -15,17 +15,17 @@
 
 /* Values should match those defined in devicetree.cb */
 
-#undef SIO_ENABLE_FDC0           // pnp 2e.0: Disable Floppy Controller
-#undef SIO_ENABLE_INFR           // pnp 2e.a: Disable Consumer IR
+#undef SIO_ENABLE_FDC0		// pnp 2e.0: Disable Floppy Controller
+#undef SIO_ENABLE_INFR		// pnp 2e.a: Disable Consumer IR
 
-#undef SIO_ENABLE_PS2K          // pnp 2e.5: Disable PS/2 Keyboard
-#undef SIO_ENABLE_PS2M          // pnp 2e.6: Disable PS/2 Mouse
-#define SIO_ENABLE_COM1          // pnp 2e.1: Enable Serial Port 1
-#define SIO_ENABLE_ENVC          // pnp 2e.4: Enable Environmental Controller
-#define SIO_ENVC_IO0      0x700  // pnp 2e.4: io 0x60
-#define SIO_ENVC_IO1      0x710  // pnp 2e.4: io 0x62
-#define SIO_ENABLE_GPIO          // pnp 2e.7: Enable GPIO
-#define SIO_GPIO_IO0      0x720  // pnp 2e.7: io 0x60
-#define SIO_GPIO_IO1      0x730  // pnp 2e.7: io 0x60
+#undef SIO_ENABLE_PS2K		// pnp 2e.5: Disable PS/2 Keyboard
+#undef SIO_ENABLE_PS2M		// pnp 2e.6: Disable PS/2 Mouse
+#define SIO_ENABLE_COM1		// pnp 2e.1: Enable Serial Port 1
+#define SIO_ENABLE_ENVC		// pnp 2e.4: Enable Environmental Controller
+#define SIO_ENVC_IO0	0x700	// pnp 2e.4: io 0x60
+#define SIO_ENVC_IO1	0x710	// pnp 2e.4: io 0x62
+#define SIO_ENABLE_GPIO		// pnp 2e.7: Enable GPIO
+#define SIO_GPIO_IO0	0x720	// pnp 2e.7: io 0x60
+#define SIO_GPIO_IO1	0x730	// pnp 2e.7: io 0x60
 
 #include "superio/ite/it8772f/acpi/superio.asl"
diff --git a/src/mainboard/google/jecht/acpi/thermal.asl b/src/mainboard/google/jecht/acpi/thermal.asl
deleted file mode 100644
index e686eab96e..0000000000
--- a/src/mainboard/google/jecht/acpi/thermal.asl
+++ /dev/null
@@ -1,339 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2014 The Chromium OS Authors. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include "../thermal.h"
-
-// Thermal Zone
-
-Scope (\_TZ)
-{
-	ThermalZone (THRM)
-	{
-		Name (_TC1, 0x02)
-		Name (_TC2, 0x05)
-
-		// Thermal zone polling frequency: 10 seconds
-		Name (_TZP, 100)
-
-		// Thermal sampling period for passive cooling: 2 seconds
-		Name (_TSP, 20)
-
-		// Convert from Degrees C to 1/10 Kelvin for ACPI
-		Method (CTOK, 1) {
-			// 10th of Degrees C
-			Multiply (Arg0, 10, Local0)
-
-			// Convert to Kelvin
-			Add (Local0, 2732, Local0)
-
-			Return (Local0)
-		}
-
-		// Threshold for OS to shutdown
-		Method (_CRT, 0, Serialized)
-		{
-			Return (CTOK (\TCRT))
-		}
-
-		// Threshold for passive cooling
-		Method (_PSV, 0, Serialized)
-		{
-			Return (CTOK (\TPSV))
-		}
-
-		// Processors used for passive cooling
-		Method (_PSL, 0, Serialized)
-		{
-			Return (\PPKG ())
-		}
-
-		// Start fan at state 4 = lowest temp state
-		Method (_INI)
-		{
-			Store (4, \FLVL)
-			Store (FAN4_PWM, \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
-			Notify (\_TZ.THRM, 0x81)
-		}
-
-		Method (TCHK, 0, Serialized)
-		{
-			// Get CPU Temperature from PECI via SuperIO TMPIN3
-			Store (\_SB.PCI0.LPCB.SIO.ENVC.TIN3, Local0)
-
-			// Check for "no reading available
-			If (LEqual (Local0, 0x80)) {
-				Return (CTOK (FAN0_THRESHOLD_ON))
-			}
-
-			// Check for invalid readings
-			If (LOr (LEqual (Local0, 255), LEqual (Local0, 0))) {
-				Return (CTOK (FAN0_THRESHOLD_ON))
-			}
-
-			// PECI raw value is an offset from Tj_max
-			Subtract (255, Local0, Local1)
-
-			// Handle values greater than Tj_max
-			If (LGreaterEqual (Local1, \TMAX)) {
-				Return (CTOK (\TMAX))
-			}
-
-			// Subtract from Tj_max to get temperature
-			Subtract (\TMAX, Local1, Local0)
-			Return (CTOK (Local0))
-		}
-
-		Method (_TMP, 0, Serialized)
-		{
-			// Get temperature from SuperIO in deci-kelvin
-			Store (TCHK (), Local0)
-
-			// Critical temperature in deci-kelvin
-			Store (CTOK (\TMAX), Local1)
-
-			If (LGreaterEqual (Local0, Local1)) {
-				Store ("CRITICAL TEMPERATURE", Debug)
-				Store (Local0, Debug)
-
-				// Wait 1 second for SuperIO to re-poll
-				Sleep (1000)
-
-				// Re-read temperature from SuperIO
-				Store (TCHK (), Local0)
-
-				Store ("RE-READ TEMPERATURE", Debug)
-				Store (Local0, Debug)
-			}
-
-			Return (Local0)
-		}
-
-		Method (_AC0) {
-			If (LLessEqual (\FLVL, 0)) {
-				Return (CTOK (FAN0_THRESHOLD_OFF))
-			} Else {
-				Return (CTOK (FAN0_THRESHOLD_ON))
-			}
-		}
-
-		Method (_AC1) {
-			If (LLessEqual (\FLVL, 1)) {
-				Return (CTOK (FAN1_THRESHOLD_OFF))
-			} Else {
-				Return (CTOK (FAN1_THRESHOLD_ON))
-			}
-		}
-
-		Method (_AC2) {
-			If (LLessEqual (\FLVL, 2)) {
-				Return (CTOK (FAN2_THRESHOLD_OFF))
-			} Else {
-				Return (CTOK (FAN2_THRESHOLD_ON))
-			}
-		}
-
-		Method (_AC3) {
-			If (LLessEqual (\FLVL, 3)) {
-				Return (CTOK (FAN3_THRESHOLD_OFF))
-			} Else {
-				Return (CTOK (FAN3_THRESHOLD_ON))
-			}
-		}
-
-		Method (_AC4) {
-			If (LLessEqual (\FLVL, 4)) {
-				Return (CTOK (FAN4_THRESHOLD_OFF))
-			} Else {
-				Return (CTOK (FAN4_THRESHOLD_ON))
-			}
-		}
-
-		Name (_AL0, Package () { FAN0 })
-		Name (_AL1, Package () { FAN1 })
-		Name (_AL2, Package () { FAN2 })
-		Name (_AL3, Package () { FAN3 })
-		Name (_AL4, Package () { FAN4 })
-
-		PowerResource (FNP0, 0, 0)
-		{
-			Method (_STA) {
-				If (LLessEqual (\FLVL, 0)) {
-					Return (One)
-				} Else {
-					Return (Zero)
-				}
-			}
-			Method (_ON)  {
-				If (LNot (_STA ())) {
-					Store (0, \FLVL)
-					Store (FAN0_PWM,
-						\_SB.PCI0.LPCB.SIO.ENVC.F2PS)
-					Notify (\_TZ.THRM, 0x81)
-				}
-			}
-			Method (_OFF) {
-				If (_STA ()) {
-					Store (1, \FLVL)
-					Store (FAN1_PWM,
-						\_SB.PCI0.LPCB.SIO.ENVC.F2PS)
-					Notify (\_TZ.THRM, 0x81)
-				}
-			}
-		}
-
-		PowerResource (FNP1, 0, 0)
-		{
-			Method (_STA) {
-				If (LLessEqual (\FLVL, 1)) {
-					Return (One)
-				} Else {
-					Return (Zero)
-				}
-			}
-			Method (_ON)  {
-				If (LNot (_STA ())) {
-					Store (1, \FLVL)
-					Store (FAN1_PWM,
-						\_SB.PCI0.LPCB.SIO.ENVC.F2PS)
-					Notify (\_TZ.THRM, 0x81)
-				}
-			}
-			Method (_OFF) {
-				If (_STA ()) {
-					Store (2, \FLVL)
-					Store (FAN2_PWM,
-						\_SB.PCI0.LPCB.SIO.ENVC.F2PS)
-					Notify (\_TZ.THRM, 0x81)
-				}
-			}
-		}
-
-		PowerResource (FNP2, 0, 0)
-		{
-			Method (_STA) {
-				If (LLessEqual (\FLVL, 2)) {
-					Return (One)
-				} Else {
-					Return (Zero)
-				}
-			}
-			Method (_ON)  {
-				If (LNot (_STA ())) {
-					Store (2, \FLVL)
-					Store (FAN2_PWM,
-						\_SB.PCI0.LPCB.SIO.ENVC.F2PS)
-					Notify (\_TZ.THRM, 0x81)
-				}
-			}
-			Method (_OFF) {
-				If (_STA ()) {
-					Store (3, \FLVL)
-					Store (FAN3_PWM,
-						\_SB.PCI0.LPCB.SIO.ENVC.F2PS)
-					Notify (\_TZ.THRM, 0x81)
-				}
-			}
-		}
-
-		PowerResource (FNP3, 0, 0)
-		{
-			Method (_STA) {
-				If (LLessEqual (\FLVL, 3)) {
-					Return (One)
-				} Else {
-					Return (Zero)
-				}
-			}
-			Method (_ON)  {
-				If (LNot (_STA ())) {
-					Store (3, \FLVL)
-					Store (FAN3_PWM,
-						\_SB.PCI0.LPCB.SIO.ENVC.F2PS)
-					Notify (\_TZ.THRM, 0x81)
-				}
-			}
-			Method (_OFF) {
-				If (_STA ()) {
-					Store (4, \FLVL)
-					Store (FAN4_PWM,
-						\_SB.PCI0.LPCB.SIO.ENVC.F2PS)
-					Notify (\_TZ.THRM, 0x81)
-				}
-			}
-		}
-
-		PowerResource (FNP4, 0, 0)
-		{
-			Method (_STA) {
-				If (LLessEqual (\FLVL, 4)) {
-					Return (One)
-				} Else {
-					Return (Zero)
-				}
-			}
-			Method (_ON)  {
-				If (LNot (_STA ())) {
-					Store (4, \FLVL)
-					Store (FAN4_PWM,
-						\_SB.PCI0.LPCB.SIO.ENVC.F2PS)
-					Notify (\_TZ.THRM, 0x81)
-				}
-			}
-			Method (_OFF) {
-				If (_STA ()) {
-					Store (4, \FLVL)
-					Store (FAN4_PWM,
-						\_SB.PCI0.LPCB.SIO.ENVC.F2PS)
-					Notify (\_TZ.THRM, 0x81)
-				}
-			}
-		}
-
-		Device (FAN0)
-		{
-			Name (_HID, EISAID ("PNP0C0B"))
-			Name (_UID, 0)
-			Name (_PR0, Package () { FNP0 })
-		}
-
-		Device (FAN1)
-		{
-			Name (_HID, EISAID ("PNP0C0B"))
-			Name (_UID, 1)
-			Name (_PR0, Package () { FNP1 })
-		}
-
-		Device (FAN2)
-		{
-			Name (_HID, EISAID ("PNP0C0B"))
-			Name (_UID, 2)
-			Name (_PR0, Package () { FNP2 })
-		}
-
-		Device (FAN3)
-		{
-			Name (_HID, EISAID ("PNP0C0B"))
-			Name (_UID, 3)
-			Name (_PR0, Package () { FNP3 })
-		}
-
-		Device (FAN4)
-		{
-			Name (_HID, EISAID ("PNP0C0B"))
-			Name (_UID, 4)
-			Name (_PR0, Package () { FNP4 })
-		}
-	}
-}