summaryrefslogtreecommitdiff
path: root/src/mainboard/google/herobrine/chromeos.fmd
diff options
context:
space:
mode:
authorRavi Kumar Bokka <rbokka@codeaurora.org>2021-07-16 16:52:34 +0530
committerShelley Chen <shchen@google.com>2021-09-03 16:58:32 +0000
commit65af8bbe72125eeaf970e5e57102cb802d00fc69 (patch)
tree5a6deba4c9a7ad6a78ab2f40e9c35656a018a4b2 /src/mainboard/google/herobrine/chromeos.fmd
parent1de2dd25f72b2cc425acd3f83ecf0eb0a1486702 (diff)
soc/qualcomm/sc7280: DDR One-Time-Training Support
Introduce DDR One-Time-Training Support Device reboots without training from second iteration and also DDR training data is 32kb size, hence update required in memlayout and to sync with upstream changes the Fmap size even got bumped up. BUG=b:182963902 TEST=Validated on qualcomm sc7280 development board Change-Id: I81038c5c7802c154f4310509c6c64710580b8ce4 Signed-off-by: Sudheer Kumar Amrabadi <samrabad@codeaurora.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54352 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Shelley Chen <shchen@google.com>
Diffstat (limited to 'src/mainboard/google/herobrine/chromeos.fmd')
-rw-r--r--src/mainboard/google/herobrine/chromeos.fmd2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/herobrine/chromeos.fmd b/src/mainboard/google/herobrine/chromeos.fmd
index a44a638e98..e85271c113 100644
--- a/src/mainboard/google/herobrine/chromeos.fmd
+++ b/src/mainboard/google/herobrine/chromeos.fmd
@@ -17,7 +17,7 @@ FLASH@0x0 8M {
RW_VPD(PRESERVE) 32K
RW_NVRAM(PRESERVE) 16K
- RW_DDR_TRAINING(PRESERVE) 8K
+ RW_MRC_CACHE(PRESERVE) 32K
RW_LIMITS_CFG(PRESERVE) 4K
RW_ELOG(PRESERVE) 4K
RW_SHARED 4K {