diff options
| author | Matt DeVillier <matt.devillier@gmail.com> | 2020-11-19 13:59:08 -0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-10-13 17:46:14 +0000 |
| commit | 680539ce8a65ddcf1170d1c6e84c6b8d0f45897a (patch) | |
| tree | 128ae45463d2527fba7d941b33102726931d0181 /src/mainboard/google/hatch | |
| parent | 9eaaf0d309af6fce19132676314932e85b790b65 (diff) | |
mb/google/wyvern: use SaGv_FixedHigh
No need for dynamic config (and the additional RAM training time)
on a Chromebox; always use high power/high performance mode.
Change-Id: I8ad773d1c616b746235ec67b98b83c5910464140
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58230
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/google/hatch')
| -rw-r--r-- | src/mainboard/google/hatch/variants/wyvern/overridetree.cb | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/google/hatch/variants/wyvern/overridetree.cb b/src/mainboard/google/hatch/variants/wyvern/overridetree.cb index 8ca9ce4683..b9dd489cf2 100644 --- a/src/mainboard/google/hatch/variants/wyvern/overridetree.cb +++ b/src/mainboard/google/hatch/variants/wyvern/overridetree.cb @@ -20,6 +20,10 @@ chip soc/intel/cannonlake [PchSerialIoIndexUART2] = PchSerialIoDisabled, }" + # No need for dynamic config (and the additional RAM training time) + # on a Chromebox; always use high power/high performance mode + register "SaGv" = "SaGv_FixedHigh" + # USB configuration register "usb2_ports[0]" = "{ .enable = 1, |