summaryrefslogtreecommitdiff
path: root/src/mainboard/google/hatch
diff options
context:
space:
mode:
authorDavid Wu <david_wu@quanta.corp-partner.google.com>2020-09-25 16:06:17 +0800
committerEdward O'Callaghan <quasisec@chromium.org>2020-09-30 02:22:12 +0000
commit006acd3c280f952f0b0ffb31779ac0470a1dd33f (patch)
treeb60836d4220acd4ba0d02ba3f9811df960b648f8 /src/mainboard/google/hatch
parent029069960e4568d0100f67fffe815f1ff035df80 (diff)
mb/google/puff: Update DPTF parameters for faffy
1. TSRO trip point from 75C change to 73C 2. Sample period time from 5s change to 60s BUG=b:160385395 BRANCH=puff TEST=build and verify by thermal team Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com> Change-Id: I0b000841845ce793be0e52fc28a07ac6a931ef7a Reviewed-on: https://review.coreboot.org/c/coreboot/+/45729 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sam McNally <sammc@google.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Diffstat (limited to 'src/mainboard/google/hatch')
-rw-r--r--src/mainboard/google/hatch/variants/faffy/overridetree.cb2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/hatch/variants/faffy/overridetree.cb b/src/mainboard/google/hatch/variants/faffy/overridetree.cb
index a05cb9d986..1ac9414c6a 100644
--- a/src/mainboard/google/hatch/variants/faffy/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/faffy/overridetree.cb
@@ -281,7 +281,7 @@ chip soc/intel/cannonlake
chip drivers/intel/dptf
## Passive Policy
register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 95, 5000)"
- register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 75, 5000)"
+ register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 73, 60000)"
## Critical Policy
register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 100, SHUTDOWN)"