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authorEdward O'Callaghan <quasisec@google.com>2020-04-29 14:05:52 +1000
committerEdward O'Callaghan <quasisec@chromium.org>2020-04-29 05:41:07 +0000
commit10757897c0714d3c7c1f4b5d67b64a7e92a5cc9e (patch)
treee6e5cb77942973de76da1c0c6c4de600fd36c980 /src/mainboard/google/hatch
parent466732262817aadb1d9464883912112fd5d03fba (diff)
mb/google/hatch/romstage_spd_smbus.c: Fix missing DIMM issue
Since `commit 0ee9b14c09c` the SPD array is set to NULL if no DIMM is present. This causes failure due to an unconditional use of `blk.spd_array[i]`, : i={0,1}. This validates the spd_array is non-NULL before use otherwise it sets the DIMM as not present. Puff fails boot with the following log: ``` ... SPD: banks 16, ranks 2, rows 16, columns 10, density 8192 Mb SPD: device width 8 bits, bus width 64 bits SPD: module size is 16384 MB (per channel) ASSERTION ERROR: file 'src/soc/intel/cannonlake/cnl_memcfg_init.c', line 47 ``` BUG=b:155220125 BRANCH=none TEST=none Change-Id: I5f47c849344951d53fa8c67e779b7c46d632d124 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40820 Reviewed-by: Jamie Chen <jamie.chen@intel.com> Reviewed-by: Sam McNally <sammc@google.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Daniel Kurtz <djkurtz@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/hatch')
-rw-r--r--src/mainboard/google/hatch/romstage_spd_smbus.c21
1 files changed, 15 insertions, 6 deletions
diff --git a/src/mainboard/google/hatch/romstage_spd_smbus.c b/src/mainboard/google/hatch/romstage_spd_smbus.c
index 4aa37fa6a4..bac5d588ea 100644
--- a/src/mainboard/google/hatch/romstage_spd_smbus.c
+++ b/src/mainboard/google/hatch/romstage_spd_smbus.c
@@ -18,15 +18,24 @@ void mainboard_memory_init_params(FSPM_UPD *memupd)
/* Access memory info through SMBUS. */
get_spd_smbus(&blk);
- memcfg.spd[0].read_type = READ_SPD_MEMPTR;
- memcfg.spd[0].spd_spec.spd_data_ptr_info.spd_data_len = blk.len;
- memcfg.spd[0].spd_spec.spd_data_ptr_info.spd_data_ptr = (uintptr_t)blk.spd_array[0];
+
+ if (blk.spd_array[0] == NULL) {
+ memcfg.spd[0].read_type = NOT_EXISTING;
+ } else {
+ memcfg.spd[0].read_type = READ_SPD_MEMPTR;
+ memcfg.spd[0].spd_spec.spd_data_ptr_info.spd_data_len = blk.len;
+ memcfg.spd[0].spd_spec.spd_data_ptr_info.spd_data_ptr = (uintptr_t)blk.spd_array[0];
+ }
memcfg.spd[1].read_type = NOT_EXISTING;
- memcfg.spd[2].read_type = READ_SPD_MEMPTR;
- memcfg.spd[2].spd_spec.spd_data_ptr_info.spd_data_len = blk.len;
- memcfg.spd[2].spd_spec.spd_data_ptr_info.spd_data_ptr = (uintptr_t)blk.spd_array[1];
+ if (blk.spd_array[1] == NULL) {
+ memcfg.spd[2].read_type = NOT_EXISTING;
+ } else {
+ memcfg.spd[2].read_type = READ_SPD_MEMPTR;
+ memcfg.spd[2].spd_spec.spd_data_ptr_info.spd_data_len = blk.len;
+ memcfg.spd[2].spd_spec.spd_data_ptr_info.spd_data_ptr = (uintptr_t)blk.spd_array[1];
+ }
memcfg.spd[3].read_type = NOT_EXISTING;
dump_spd_info(&blk);