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| author | David Wu <david_wu@quanta.corp-partner.google.com> | 2019-11-26 19:16:25 +0800 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2019-11-27 18:55:03 +0000 |
| commit | d492f01bf16e28cc55e64462e98ba7c99b1bb336 (patch) | |
| tree | 0918c66a7eec3e3dd401dbd9bb927174de38e050 /src/mainboard/google/hatch/variants | |
| parent | c7fc199f40339344903c51ff51bbf8610f218b86 (diff) | |
mb/google/hatch/var/kindred: Add ELAN touchscreen support
Add ELAN EKTH6918 USI touchsreen support.
BUG=b:131205495 b:127996093
TEST=FW_NAME=kindred emerge-hatch coreboot chromeos-bootimage
and check touchscreen work.
Change-Id: I8b003685cd7ee68738bcd4298b63a44d6e6118e4
Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37236
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/hatch/variants')
| -rw-r--r-- | src/mainboard/google/hatch/variants/kindred/overridetree.cb | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/src/mainboard/google/hatch/variants/kindred/overridetree.cb b/src/mainboard/google/hatch/variants/kindred/overridetree.cb index 9d33fa96d0..1122609649 100644 --- a/src/mainboard/google/hatch/variants/kindred/overridetree.cb +++ b/src/mainboard/google/hatch/variants/kindred/overridetree.cb @@ -145,6 +145,22 @@ chip soc/intel/cannonlake register "has_power_resource" = "1" device i2c 39 on end end + chip drivers/i2c/hid + register "generic.hid" = ""ELAN9004"" + register "generic.desc" = ""ELAN Touchscreen"" + register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPP_D16_IRQ)" + register "generic.probed" = "1" + register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D15)" + register "generic.reset_delay_ms" = "20" + register "generic.reset_off_delay_ms" = "2" + register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D9)" + register "generic.enable_delay_ms" = "10" + register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C4)" + register "generic.stop_delay_ms" = "300" + register "generic.has_power_resource" = "1" + register "hid_desc_reg_offset" = "0x01" + device i2c 10 on end + end chip drivers/generic/gpio_keys register "name" = ""PENH"" register "gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A8)" |