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authorSumeet Pawnikar <sumeet.r.pawnikar@intel.com>2019-11-04 14:31:06 +0530
committerShelley Chen <shchen@google.com>2019-11-05 19:14:44 +0000
commit6a657c26462f9c5896e504cd4027e58bc6db7d86 (patch)
tree8edb0da84dfe2f03a65c6d809a699dabd002f46c /src/mainboard/google/hatch/variants
parent007af4251fe83326d581d158910ecff12059dbfe (diff)
mb/google/hatch/variants/helios: Update TSR3 sensor thresholds
Update thermal threshold settings for TSR3 sensor. There is an issue fan is always running, even during system idle state. This change fixes this issue and fan starts only when it breaches the temperature threshold. BRANCH=None BUG=b:143861559 TEST=Built and tested on Helios system Change-Id: Ia417f8c51442005cc8c2251c188cebc197e0a773 Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36609 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Shelley Chen <shchen@google.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/hatch/variants')
-rw-r--r--src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl16
1 files changed, 8 insertions, 8 deletions
diff --git a/src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl b/src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl
index 90943529b6..20a61d7df4 100644
--- a/src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl
+++ b/src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl
@@ -36,14 +36,14 @@
#define DPTF_TSR3_SENSOR_ID 3
#define DPTF_TSR3_SENSOR_NAME "CPU"
-#define DPTF_TSR3_PASSIVE 85
-#define DPTF_TSR3_CRITICAL 100
-#define DPTF_TSR3_ACTIVE_AC0 0
-#define DPTF_TSR3_ACTIVE_AC1 0
-#define DPTF_TSR3_ACTIVE_AC2 0
-#define DPTF_TSR3_ACTIVE_AC3 0
-#define DPTF_TSR3_ACTIVE_AC4 0
-#define DPTF_TSR3_ACTIVE_AC5 0
+#define DPTF_TSR3_PASSIVE 90
+#define DPTF_TSR3_CRITICAL 105
+#define DPTF_TSR3_ACTIVE_AC0 87
+#define DPTF_TSR3_ACTIVE_AC1 85
+#define DPTF_TSR3_ACTIVE_AC2 83
+#define DPTF_TSR3_ACTIVE_AC3 80
+#define DPTF_TSR3_ACTIVE_AC4 78
+#define DPTF_TSR3_ACTIVE_AC5 75
#define DPTF_ENABLE_CHARGER
#define DPTF_ENABLE_FAN_CONTROL