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authorPhilip Chen <philipchen@google.com>2019-04-11 22:27:08 -0700
committerPatrick Georgi <pgeorgi@google.com>2019-04-25 15:48:17 +0000
commit5849b14705a2994f8386a265998d415b01c43996 (patch)
treeaa29083c84274344f4bfe4584c446edafc53b171 /src/mainboard/google/hatch/variants
parent0987e43aa05bfbafbfdd4952638b79a5084369f8 (diff)
mb/google/hatch: Pull up GPP_C13 for hatch and hatch_whl
On EC end, we want to change this pin from push-pull to open-drain. And since there is no external pull-up resistor on the board, we'll have to configure this pin as internal-pull-up on AP end. BUG=b:129306003 TEST=None Change-Id: Ibc1f89fc25773220db009c6571400b01390dd756 Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32292 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google/hatch/variants')
-rw-r--r--src/mainboard/google/hatch/variants/baseboard/gpio.c2
-rw-r--r--src/mainboard/google/hatch/variants/hatch/Makefile.inc2
-rw-r--r--src/mainboard/google/hatch/variants/hatch/gpio.c32
-rw-r--r--src/mainboard/google/hatch/variants/hatch_whl/Makefile.inc2
-rw-r--r--src/mainboard/google/hatch/variants/hatch_whl/gpio.c32
5 files changed, 69 insertions, 1 deletions
diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c
index 7e82b9b6ec..df1c65ea1f 100644
--- a/src/mainboard/google/hatch/variants/baseboard/gpio.c
+++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c
@@ -428,7 +428,7 @@ static const struct pad_config s5_sleep_gpio_table[] = {
PAD_CFG_GPO(GPP_A18, 0, DEEP), /* EN_PP3300_WWAN */
};
-const struct pad_config * __weak variant_sleep_gpio_table(
+const struct pad_config *__weak variant_sleep_gpio_table(
u8 slp_typ, size_t *num)
{
if (slp_typ == ACPI_S5) {
diff --git a/src/mainboard/google/hatch/variants/hatch/Makefile.inc b/src/mainboard/google/hatch/variants/hatch/Makefile.inc
index cf6ee5ac97..555cbb463c 100644
--- a/src/mainboard/google/hatch/variants/hatch/Makefile.inc
+++ b/src/mainboard/google/hatch/variants/hatch/Makefile.inc
@@ -18,3 +18,5 @@ SPD_SOURCES += 8G_2400 # 0b010
SPD_SOURCES += 8G_2666 # 0b011
SPD_SOURCES += 16G_2400 # 0b100
SPD_SOURCES += 16G_2666 # 0b101
+
+ramstage-y += gpio.c
diff --git a/src/mainboard/google/hatch/variants/hatch/gpio.c b/src/mainboard/google/hatch/variants/hatch/gpio.c
new file mode 100644
index 0000000000..7e73724387
--- /dev/null
+++ b/src/mainboard/google/hatch/variants/hatch/gpio.c
@@ -0,0 +1,32 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2019 Google LLC
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/acpi.h>
+#include <baseboard/gpio.h>
+#include <baseboard/variants.h>
+#include <commonlib/helpers.h>
+
+static const struct pad_config gpio_table[] = {
+ /* C13 : EC_PCH_INT_L
+ * TODO Configure it back to invert mode, when
+ * ITSS IPCx configuration is fixed in FSP.
+ */
+ PAD_CFG_GPI_APIC(GPP_C13, UP_20K, PLTRST, LEVEL, NONE)};
+
+const struct pad_config *override_gpio_table(size_t *num)
+{
+ *num = ARRAY_SIZE(gpio_table);
+ return gpio_table;
+}
diff --git a/src/mainboard/google/hatch/variants/hatch_whl/Makefile.inc b/src/mainboard/google/hatch/variants/hatch_whl/Makefile.inc
index 4fa98eacf2..ecf5c2fbdb 100644
--- a/src/mainboard/google/hatch/variants/hatch_whl/Makefile.inc
+++ b/src/mainboard/google/hatch/variants/hatch_whl/Makefile.inc
@@ -18,3 +18,5 @@ SPD_SOURCES += empty_ddr4 # 0b010
SPD_SOURCES += empty_ddr4 # 0b011
SPD_SOURCES += empty_ddr4 # 0b100
SPD_SOURCES += 8G_2666 # 0b101
+
+ramstage-y += gpio.c
diff --git a/src/mainboard/google/hatch/variants/hatch_whl/gpio.c b/src/mainboard/google/hatch/variants/hatch_whl/gpio.c
new file mode 100644
index 0000000000..7e73724387
--- /dev/null
+++ b/src/mainboard/google/hatch/variants/hatch_whl/gpio.c
@@ -0,0 +1,32 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2019 Google LLC
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/acpi.h>
+#include <baseboard/gpio.h>
+#include <baseboard/variants.h>
+#include <commonlib/helpers.h>
+
+static const struct pad_config gpio_table[] = {
+ /* C13 : EC_PCH_INT_L
+ * TODO Configure it back to invert mode, when
+ * ITSS IPCx configuration is fixed in FSP.
+ */
+ PAD_CFG_GPI_APIC(GPP_C13, UP_20K, PLTRST, LEVEL, NONE)};
+
+const struct pad_config *override_gpio_table(size_t *num)
+{
+ *num = ARRAY_SIZE(gpio_table);
+ return gpio_table;
+}