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authorMatt DeVillier <matt.devillier@amd.corp-partner.google.com>2023-01-11 17:41:37 -0600
committerMartin L Roth <gaumless@gmail.com>2023-01-15 02:01:48 +0000
commit4902e9b35f1b62c2c28e582e33ad55d2543f1483 (patch)
treeecf83ae2983dbf3318bbb2bf315eee6cc3ed903d /src/mainboard/google/hatch/variants
parent2e6c55946c4d4ff04e1bc8de7272a4cef63ed55d (diff)
drivers/i2c/generic: Drop 'disable_gpio_export_in_crs' flag
Exposing the GPIOs via an ACPI PowerResource and the _CRS results in the OS driver and ACPI thinking they own the GPIO. This can cause timing problems because it's not clear which system should be controlling the GPIO. Previously, we flagged as an error any device which set the 'has_power_resource' flag but did not set 'disable_gpio_export_in_crs.' There's no reason to require explicit disablement however, so drop the superfluous 'disable' flag, and change the _CRS generation to check if the GPIOs will be exported via the 'has_power_resource' flag instead. BUG=b:265055477 TEST=build/boot skyrim, dump SSDT and verify touchscreen GPIOs only listed under PRx, not under _CRS. Change-Id: I837ae6c6fe4b8e1c4e10686406cba06bdb7759d2 Signed-off-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71849 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com>
Diffstat (limited to 'src/mainboard/google/hatch/variants')
-rw-r--r--src/mainboard/google/hatch/variants/dratini/overridetree.cb1
-rw-r--r--src/mainboard/google/hatch/variants/jinlon/overridetree.cb1
-rw-r--r--src/mainboard/google/hatch/variants/kohaku/overridetree.cb1
-rw-r--r--src/mainboard/google/hatch/variants/nightfury/overridetree.cb1
4 files changed, 0 insertions, 4 deletions
diff --git a/src/mainboard/google/hatch/variants/dratini/overridetree.cb b/src/mainboard/google/hatch/variants/dratini/overridetree.cb
index a2fd9b7667..8d4ae62aec 100644
--- a/src/mainboard/google/hatch/variants/dratini/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/dratini/overridetree.cb
@@ -93,7 +93,6 @@ chip soc/intel/cannonlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D9)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
- register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 40 on end
end
diff --git a/src/mainboard/google/hatch/variants/jinlon/overridetree.cb b/src/mainboard/google/hatch/variants/jinlon/overridetree.cb
index 0d1cccd5d1..3c29b23888 100644
--- a/src/mainboard/google/hatch/variants/jinlon/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/jinlon/overridetree.cb
@@ -115,7 +115,6 @@ chip soc/intel/cannonlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D9)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
- register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 40 on end
end
diff --git a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb
index 9eceac27c9..915b6c36a6 100644
--- a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb
@@ -177,7 +177,6 @@ chip soc/intel/cannonlake
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C12)"
register "enable_delay_ms" = "1" # 90 ns
register "has_power_resource" = "1"
- register "disable_gpio_export_in_crs" = "1"
register "detect" = "1"
device i2c 4b on end
end
diff --git a/src/mainboard/google/hatch/variants/nightfury/overridetree.cb b/src/mainboard/google/hatch/variants/nightfury/overridetree.cb
index c2b672a778..2d7bf45d44 100644
--- a/src/mainboard/google/hatch/variants/nightfury/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/nightfury/overridetree.cb
@@ -214,7 +214,6 @@ chip soc/intel/cannonlake
register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D15)"
register "generic.reset_delay_ms" = "20"
register "generic.has_power_resource" = "1"
- register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 0x10 on end
end