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authorMatt DeVillier <matt.devillier@gmail.com>2024-01-26 16:09:42 -0600
committerFelix Singer <service+coreboot-gerrit@felixsinger.de>2024-02-13 19:20:11 +0000
commit1810a184152800468dc1a5d6119f04c028ce39d9 (patch)
tree1b07fcd0f27dc62fa1135cba3ec584829f35ce90 /src/mainboard/google/hatch/variants
parent32d679e8a423e1aa5aec4f262a69396eaa9d2476 (diff)
mb/google/*: Replace use of gfx/generic addr field with display type
Eliminates the use of a magic number, and the resulting DID entry in the _DOD method is the same. TEST=build/boot google/drallion, dump SSDT and verify DID entry is unchanged. Change-Id: Ic929cf7ec6849ba398653226bbe46d27b4e3fa81 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80200 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <ericllai@google.com> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Diffstat (limited to 'src/mainboard/google/hatch/variants')
-rw-r--r--src/mainboard/google/hatch/variants/jinlon/overridetree.cb2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/hatch/variants/jinlon/overridetree.cb b/src/mainboard/google/hatch/variants/jinlon/overridetree.cb
index a4c29ca3a1..81e78835c8 100644
--- a/src/mainboard/google/hatch/variants/jinlon/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/jinlon/overridetree.cb
@@ -76,7 +76,7 @@ chip soc/intel/cannonlake
# Use ChromeOS privacy screen HID
register "device[0].hid" = ""GOOG0010""
# Internal panel on the first port of the graphics chip
- register "device[0].addr" = "0x80010400"
+ register "device[0].type" = "panel"
register "device[0].privacy.enabled" = "1"
register "device[0].privacy.gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E0)"
device generic 0 alias eps on end