diff options
| author | Seunghwan Kim <sh_.kim@samsung.com> | 2019-09-23 10:19:17 +0900 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-09-24 10:28:42 +0000 |
| commit | df02f7aed8c2f959485d891c339f23628282a99c (patch) | |
| tree | df9cd41f3f4f8f34605081a2b435f355f7b29e9d /src/mainboard/google/hatch/variants/kohaku/overridetree.cb | |
| parent | 9400f84d3111ee888ac1a2b2e1fc942873e0d67a (diff) | |
mb/google/kohaku: Update DPTF parameters and TCC offset setting
This change applies fine-tuned DPTF parameters and TCC offset setting
for kohaku. Also enables EC_ENABLE_MULTIPLE_DPTF_PROFILES for tablet
mode.
BUG=b:137688474
BRANCH=none
TEST=built and verified the setting values
Change-Id: I92e268b2e07ca5a04e29bda84ddb8fc21eb23251
Signed-off-by: Seunghwan Kim <sh_.kim@samsung.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35532
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shelley Chen <shchen@google.com>
Diffstat (limited to 'src/mainboard/google/hatch/variants/kohaku/overridetree.cb')
| -rw-r--r-- | src/mainboard/google/hatch/variants/kohaku/overridetree.cb | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb index ff6d817136..8c7bb1ff9a 100644 --- a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb +++ b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb @@ -2,6 +2,8 @@ chip soc/intel/cannonlake register "tdp_pl1_override" = "8" register "tdp_pl2_override" = "51" + register "tcc_offset" = "35" # TCC of 65C + register "SerialIoDevMode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoPci, [PchSerialIoIndexI2C1] = PchSerialIoPci, |