diff options
| author | Seunghwan Kim <sh_.kim@samsung.com> | 2019-07-26 14:45:49 +0900 |
|---|---|---|
| committer | Shelley Chen <shchen@google.com> | 2019-08-07 16:24:55 +0000 |
| commit | 042e46f6c845dd64adf781cd254fd5a899688677 (patch) | |
| tree | 868d4ec5d71ae21618d231c2d9734543fae4e717 /src/mainboard/google/hatch/variants/kohaku/gpio.c | |
| parent | cafbbf526180d8eb91a1c386667f2449b07000cb (diff) | |
mb/google/kohaku: Enable stylus pen device
Enabling stylus pen device and pen_eject event.
- Adding enable_gpio for power sequencing
- Configuring GPP_H4 and GPP_H5 as native function
- Adding PENH device node for pen ejection event
BUG=b:137326841
BRANCH=none
TEST=Verified pen input operation and pen_eject event (pop-up and wake
from s0ix on pen ejection)
Change-Id: Ic252a1f90c0fc6cb9b1e426d75a8b503824681f3
Signed-off-by: Seunghwan Kim <sh_.kim@samsung.com>
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34581
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Diffstat (limited to 'src/mainboard/google/hatch/variants/kohaku/gpio.c')
| -rw-r--r-- | src/mainboard/google/hatch/variants/kohaku/gpio.c | 18 |
1 files changed, 8 insertions, 10 deletions
diff --git a/src/mainboard/google/hatch/variants/kohaku/gpio.c b/src/mainboard/google/hatch/variants/kohaku/gpio.c index 88c1d7b14c..d22de04648 100644 --- a/src/mainboard/google/hatch/variants/kohaku/gpio.c +++ b/src/mainboard/google/hatch/variants/kohaku/gpio.c @@ -24,7 +24,7 @@ static const struct pad_config gpio_table[] = { /* A6 : SERIRQ ==> NC */ PAD_NC(GPP_A6, NONE), /* A10 : PEN_RESET_ODL */ - PAD_CFG_GPO(GPP_A10, 0, DEEP), + PAD_CFG_GPO(GPP_A10, 1, DEEP), /* A17 : PIRQA# ==> NC */ PAD_NC(GPP_A17, NONE), /* A18 : ISH_GP0 ==> NC */ @@ -39,15 +39,9 @@ static const struct pad_config gpio_table[] = { PAD_NC(GPP_B8, NONE), /* C1 : SMBDATA: NC */ PAD_NC(GPP_C1, NONE), - /* - * C12 : EMR_GARAGE_INT - * The same signal is routed to both A8 and C12. Currently C12 - * is the interrupt source, and A8 is the wake source. - * Hoping that GPP_A8 can be used for both interrupt (SCI) and wake - * (GPIO). Keeping as GPI for now. - */ - PAD_CFG_GPI_SCI(GPP_C12, NONE, DEEP, EDGE_SINGLE, INVERT), - /* C15 : EN_PP3300_TSP_DIG_DX */ + /* C7 : PEN_IRQ_OD_L */ + PAD_CFG_GPI_APIC(GPP_C7, NONE, PLTRST, LEVEL, INVERT), + /* C15 : EN_PP3300_DIG_DX */ PAD_CFG_GPO(GPP_C15, 0, DEEP), /* C23 : UART2_CTS# ==> NC */ PAD_NC(GPP_C23, NONE), @@ -69,6 +63,10 @@ static const struct pad_config gpio_table[] = { PAD_NC(GPP_G5, NONE), /* G6 : GPP_G6 ==> NC */ PAD_NC(GPP_G6, NONE), + /* H4 : PCH_I2C_PEN_SDA */ + PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1), + /* H5 : PCH_I2C_PEN_SCL */ + PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1), }; const struct pad_config *override_gpio_table(size_t *num) |