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author | Aamir Bohra <aamir.bohra@intel.com> | 2020-03-16 18:57:48 +0530 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-20 09:40:07 +0000 |
commit | a1c82c5ebee830fa28a1962618bba4946e68f3ba (patch) | |
tree | 5f083cb609cc6f104cbbc80f286c4617c9328272 /src/mainboard/google/hatch/variants/jinlon | |
parent | 12b835050f0af9341b257560b60a8060c8fad328 (diff) |
drivers/generic/max98357a: Allow custom _HID from config
Add HID field in max98357a_config and allow mainboards to set it.
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Change-Id: I22d2d078a9a4eb6ab330da8439737ff5133086d4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39286
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/hatch/variants/jinlon')
-rw-r--r-- | src/mainboard/google/hatch/variants/jinlon/overridetree.cb | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/hatch/variants/jinlon/overridetree.cb b/src/mainboard/google/hatch/variants/jinlon/overridetree.cb index f7ca7d5c39..7cf434dd91 100644 --- a/src/mainboard/google/hatch/variants/jinlon/overridetree.cb +++ b/src/mainboard/google/hatch/variants/jinlon/overridetree.cb @@ -178,6 +178,7 @@ chip soc/intel/cannonlake end # GSPI #1 device pci 1f.3 on chip drivers/generic/max98357a + register "hid" = ""MX98357A"" register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H3)" register "sdmode_delay" = "5" device generic 0 on end |