diff options
| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2019-05-21 14:00:53 -0600 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2019-05-31 18:54:04 +0000 |
| commit | cdc459e66a3c6b68bae2515120445a10483df7f4 (patch) | |
| tree | fc8200aa3da64b9e6bdd7dcf32f8f6cb629e695b /src/mainboard/google/hatch/variants/helios/overridetree.cb | |
| parent | a66c9b8bf4e4db0a108f90c21084ecc25aa87e72 (diff) | |
mb/google/hatch: Create helios variant
Created helios (hatch variant). Currenly copied from kohaku. Helios-
specific changes will come later.
BUG=b:133182138
BRANCH=none
TEST=none
Change-Id: I9d151621a1c42e6f3cadb288f7ea476828c059b5
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32919
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Diffstat (limited to 'src/mainboard/google/hatch/variants/helios/overridetree.cb')
| -rw-r--r-- | src/mainboard/google/hatch/variants/helios/overridetree.cb | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/src/mainboard/google/hatch/variants/helios/overridetree.cb b/src/mainboard/google/hatch/variants/helios/overridetree.cb new file mode 100644 index 0000000000..84f0e29afa --- /dev/null +++ b/src/mainboard/google/hatch/variants/helios/overridetree.cb @@ -0,0 +1,46 @@ +chip soc/intel/cannonlake + register "SerialIoDevMode" = "{ + [PchSerialIoIndexI2C0] = PchSerialIoPci, + [PchSerialIoIndexI2C1] = PchSerialIoPci, + [PchSerialIoIndexI2C2] = PchSerialIoPci, + [PchSerialIoIndexI2C3] = PchSerialIoPci, + [PchSerialIoIndexI2C4] = PchSerialIoPci, + [PchSerialIoIndexI2C5] = PchSerialIoPci, + [PchSerialIoIndexSPI0] = PchSerialIoPci, + [PchSerialIoIndexSPI1] = PchSerialIoPci, + [PchSerialIoIndexSPI2] = PchSerialIoDisabled, + [PchSerialIoIndexUART0] = PchSerialIoSkipInit, + [PchSerialIoIndexUART1] = PchSerialIoDisabled, + [PchSerialIoIndexUART2] = PchSerialIoDisabled, + }" + + # Intel Common SoC Config + #+-------------------+---------------------------+ + #| Field | Value | + #+-------------------+---------------------------+ + #| I2C0 | Trackpad | + #| I2C1 | Touchscreen | + #| I2C2 | Digitizer | + #| I2C4 | Audio | + #+-------------------+---------------------------+ + register "common_soc_config" = "{ + .i2c[0] = { + .speed = I2C_SPEED_FAST, + }, + .i2c[1] = { + .speed = I2C_SPEED_FAST, + }, + .i2c[2] = { + .speed = I2C_SPEED_FAST, + }, + .i2c[4] = { + .speed = I2C_SPEED_FAST, + }, + .gspi[0] = { + .speed_mhz = 1, + .early_init = 1, + }, + }" + + device domain 0 on end +end |