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authorShelley Chen <shchen@google.com>2019-02-11 13:06:10 -0800
committerPatrick Georgi <pgeorgi@google.com>2019-03-14 11:27:58 +0000
commit2ee720ca45ea6dbdfe24893bba7a47248387ba2f (patch)
tree19c54e521fa9c2177aecf577ff3e79206027caca /src/mainboard/google/hatch/variants/baseboard/gpio.c
parentfa861eea3057bbbf067c7361c35721a2681a036e (diff)
mb/google/hatch: Use MEM_CH_SEL to indicate single_channel sku
MEM_CH_SEL is used to indicate whether we are on a single or dual channel device, where MEM_CH_SEL = 1 for single channel skus and MEM_CH_SEL = 0 for dual channel skus. Initialize single_channel field (from GPP_F2), which will in turn initialize MemorySpdPtr pointers in cannonlake soc code. In the first build, we did not use GPP_F2, so we need to add an internal pulldown as those early devices were all dual channel devices. BUG=b:123062346, b:122959294 BRANCH=None TEST=Boot into current boards and ensure that we have 2 channels as expected Also, verify that GPP_F2 is set to 0. Change-Id: I89d022793580be603a93d0b177d73ce968529b5c Signed-off-by: Shelley Chen <shchen@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31358 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google/hatch/variants/baseboard/gpio.c')
-rw-r--r--src/mainboard/google/hatch/variants/baseboard/gpio.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c
index 091f6b8b30..93e0af1753 100644
--- a/src/mainboard/google/hatch/variants/baseboard/gpio.c
+++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c
@@ -281,7 +281,7 @@ static const struct pad_config gpio_table[] = {
/* F1 : WWAN_RESET_1V8_ODL */
PAD_CFG_GPO(GPP_F1, 1, DEEP),
/* F2 : MEM_CH_SEL */
- PAD_CFG_GPI(GPP_F2, NONE, PLTRST),
+ PAD_CFG_GPI(GPP_F2, DN_20K, PLTRST),
/* F3 : GPP_F3 ==> NC */
PAD_NC(GPP_F3, NONE),
/* F4 : CNV_BRI_DT */
@@ -429,7 +429,7 @@ static const struct pad_config early_gpio_table[] = {
/* C23 : WLAN_PE_RST# */
PAD_CFG_GPO(GPP_C23, 1, DEEP),
/* F2 : MEM_CH_SEL */
- PAD_CFG_GPI(GPP_F2, NONE, PLTRST),
+ PAD_CFG_GPI(GPP_F2, DN_20K, PLTRST),
/* F11 : PCH_MEM_STRAP2 */
PAD_CFG_GPI(GPP_F11, NONE, PLTRST),
/* F20 : PCH_MEM_STRAP0 */