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authorKenneth Chan <kenneth.chan@quanta.corp-partner.google.com>2021-12-23 18:15:01 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-01-04 11:48:39 +0000
commit71c5dfc01ee390a64605f679420485b7f7cfc389 (patch)
tree14e4a3238a2c45b9c4cbd6d898bd7e58d7d96701 /src/mainboard/google/guybrush
parentaf4bd5633debc8838b563c3fadd96e2b4b060ab5 (diff)
mb/google/guybrush/var/dewatt: disable unused PCIe clock setting
GPP_CLK1 is used for SD and GPP_CLK2 is for WWAN on guybrush. Disable unused PCIe GPP_CLK1 and GPP_CLK2 for dewatt. BUG=b:211566312 TEST=emerge-guybrush coreboot Signed-off-by: Kenneth Chan <kenneth.chan@quanta.corp-partner.google.com> Change-Id: If449453bc60ed41e104346429babc06a73acef64 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60328 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Rob Barnes <robbarnes@google.com>
Diffstat (limited to 'src/mainboard/google/guybrush')
-rw-r--r--src/mainboard/google/guybrush/variants/dewatt/overridetree.cb4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/google/guybrush/variants/dewatt/overridetree.cb b/src/mainboard/google/guybrush/variants/dewatt/overridetree.cb
index 5366d68587..f34bac86a0 100644
--- a/src/mainboard/google/guybrush/variants/dewatt/overridetree.cb
+++ b/src/mainboard/google/guybrush/variants/dewatt/overridetree.cb
@@ -58,6 +58,10 @@ chip soc/amd/cezanne
},
}"
+ # general purpose PCIe clock output configuration
+ register "gpp_clk_config[1]" = "GPP_CLK_OFF"
+ register "gpp_clk_config[2]" = "GPP_CLK_OFF"
+
# I2C Config
#+-------------------+---------------------------+
#| Field | Value |