diff options
| author | Ege Mihmanli <egemih@google.com> | 2017-11-15 17:19:58 -0800 |
|---|---|---|
| committer | Julius Werner <jwerner@chromium.org> | 2017-11-20 18:56:45 +0000 |
| commit | 75b154334d0e1273a4164fea87730c28d47109a5 (patch) | |
| tree | 788a7631dd35041a8caff2407f98bca5c1a644c8 /src/mainboard/google/gru/bootblock.c | |
| parent | 21573e9f4e6c5ec1c5ab7da265f42642f832394b (diff) | |
google/gru: Add config for scarlet-derived boards
There is merit in having new boards use the pinouts and controls
in scarlet. This adds a config so new scarlet-derived boards can
easily use scarlet structure without going through every file
and adding new logic.
TEST=Run "emerge-scarlet coreboot"
Signed-off-by: egemih@chromium.org
Change-Id: I5808f93f4563033ce93050e1eedb6eac2b52c3b3
Reviewed-on: https://review.coreboot.org/22517
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/mainboard/google/gru/bootblock.c')
| -rw-r--r-- | src/mainboard/google/gru/bootblock.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/google/gru/bootblock.c b/src/mainboard/google/gru/bootblock.c index 162a7e51f1..a18a61c101 100644 --- a/src/mainboard/google/gru/bootblock.c +++ b/src/mainboard/google/gru/bootblock.c @@ -44,8 +44,8 @@ void bootblock_mainboard_early_init(void) */ write32(&rk3399_grf->io_vsel, RK_SETBITS(1 << 0)); - /* Scarlet gpio4cd iodomain is 1.8V */ - if (IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET)) + /* Scarlet-based gpio4cd iodomain is 1.8V */ + if (IS_ENABLED(CONFIG_GRU_BASEBOARD_SCARLET)) write32(&rk3399_grf->io_vsel, RK_SETBITS(1 << 3)); /* Reconfigure GPIO1 from dynamic voltage selection through GPIO0_B1 to @@ -56,7 +56,7 @@ void bootblock_mainboard_early_init(void) /* Enable rails powering GPIO blocks, among other things. */ gpio_output(GPIO_P30V_EN, 1); - if (!IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET)) + if (!IS_ENABLED(CONFIG_GRU_BASEBOARD_SCARLET)) gpio_output(GPIO_P15V_EN, 1); /* Scarlet: EC-controlled */ #if IS_ENABLED(CONFIG_DRIVERS_UART) @@ -102,7 +102,7 @@ static void configure_tpm(void) if (IS_ENABLED(CONFIG_GRU_HAS_TPM2)) { rockchip_spi_init(CONFIG_DRIVER_TPM_SPI_BUS, 1500*KHz); - if (IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET)) { + if (IS_ENABLED(CONFIG_GRU_BASEBOARD_SCARLET)) { gpio_input(GPIO(2, B, 1)); /* SPI2_MISO no-pull */ gpio_input(GPIO(2, B, 2)); /* SPI2_MOSI no-pull */ gpio_input(GPIO(2, B, 3)); /* SPI2_CLK no-pull */ |