diff options
| author | Furquan Shaikh <furquan@chromium.org> | 2017-10-06 17:05:50 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2017-10-09 20:20:40 +0000 |
| commit | 219ebb969bb52eb88d49d6ce31dbfc0d7cabfc49 (patch) | |
| tree | 5597f190251338d86df7ee8706faa765d9ee4d5c /src/mainboard/google/glados | |
| parent | e9d8959c4f11399c7ec1609ecff204c8f3c9b3ea (diff) | |
skylake mainboards: Use PAD_CFG_GPI_GPIO_DRIVER instead of PAD_CFG_GPI
Change 1760cd3e (soc/intel/skylake: Use common/block/gpio) updated all
skylake boards to use common gpio driver. Common gpio code
defines PAD_CFG_GPI without GPIO_DRIVER ownership. However, for
skylake PAD_CFG_GPI set GPIO_DRIVER ownership by default. This
resulted in Linux kernel failing to configure all GPIO IRQs since the
ownership was not set correctly. (Observed error in dmesg: "genirq:
Setting trigger mode 3 for irq 201
failed (intel_gpio_irq_type+0x0/0x110)")
This change fixes the above issue by replacing all uses of PAD_CFG_GPI
in skylake mainboards to PAD_CFG_GPI_GPIO_DRIVER.
BUG=b:67507004
TEST=Verified on soraka that the genirq error is no longer observed in
dmesg. Also, cat /proc/interrupts has the interrupts configured
correctly.
Change-Id: I7dab302f372e56864432100a56462b92d43060ee
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/21912
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/google/glados')
| -rw-r--r-- | src/mainboard/google/glados/gpio.h | 32 |
1 files changed, 19 insertions, 13 deletions
diff --git a/src/mainboard/google/glados/gpio.h b/src/mainboard/google/glados/gpio.h index 8e5e16228b..acd0eada1b 100644 --- a/src/mainboard/google/glados/gpio.h +++ b/src/mainboard/google/glados/gpio.h @@ -107,19 +107,24 @@ static const struct pad_config gpio_table[] = { /* SMBCLK */ PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1), /* XDP */ /* SMBDATA */ PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1), /* XDP */ /* SMBALERT# */ /* GPP_C2 */ -/* SML0CLK */ PAD_CFG_GPI(GPP_C3, NONE, DEEP), -/* SML0DATA */ PAD_CFG_GPI(GPP_C4, NONE, DEEP), +/* SML0CLK */ PAD_CFG_GPI_GPIO_DRIVER(GPP_C3, NONE, DEEP), +/* SML0DATA */ PAD_CFG_GPI_GPIO_DRIVER(GPP_C4, NONE, DEEP), /* SML0ALERT# */ PAD_CFG_GPO(GPP_C5, 0, DEEP), -/* SM1CLK */ PAD_CFG_GPI(GPP_C6, 20K_PU, DEEP), /* EC_IN_RW */ -/* SM1DATA */ PAD_CFG_GPI(GPP_C7, NONE, DEEP), +/* SM1CLK */ PAD_CFG_GPI_GPIO_DRIVER(GPP_C6, 20K_PU, + DEEP), /* EC_IN_RW */ +/* SM1DATA */ PAD_CFG_GPI_GPIO_DRIVER(GPP_C7, NONE, DEEP), /* UART0_RXD */ /* GPP_C8 */ /* UART0_TXD */ /* GPP_C9 */ /* UART0_RTS# */ /* GPP_C10 */ /* UART0_CTS# */ PAD_CFG_GPO(GPP_C11, 0, DEEP), /* EN_PP3300_KEPLER */ -/* UART1_RXD */ PAD_CFG_GPI(GPP_C12, NONE, DEEP), /* MEM_CONFIG[0] */ -/* UART1_TXD */ PAD_CFG_GPI(GPP_C13, NONE, DEEP), /* MEM_CONFIG[1] */ -/* UART1_RTS# */ PAD_CFG_GPI(GPP_C14, NONE, DEEP), /* MEM_CONFIG[2] */ -/* UART1_CTS# */ PAD_CFG_GPI(GPP_C15, NONE, DEEP), /* MEM_CONFIG[3] */ +/* UART1_RXD */ PAD_CFG_GPI_GPIO_DRIVER(GPP_C12, NONE, + DEEP), /* MEM_CONFIG[0] */ +/* UART1_TXD */ PAD_CFG_GPI_GPIO_DRIVER(GPP_C13, NONE, + DEEP), /* MEM_CONFIG[1] */ +/* UART1_RTS# */ PAD_CFG_GPI_GPIO_DRIVER(GPP_C14, NONE, + DEEP), /* MEM_CONFIG[2] */ +/* UART1_CTS# */ PAD_CFG_GPI_GPIO_DRIVER(GPP_C15, NONE, + DEEP), /* MEM_CONFIG[3] */ /* I2C0_SDA */ PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1), /* TOUCHSCREEN */ /* I2C0_SCL */ PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1), /* TOUCHSCREEN */ /* I2C1_SDA */ PAD_CFG_NF(GPP_C18, NONE, DEEP, NF1), /* TRACKPAD */ @@ -127,7 +132,8 @@ static const struct pad_config gpio_table[] = { /* UART2_RXD */ PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), /* SERVO */ /* UART2_TXD */ PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), /* SERVO */ /* UART2_RTS# */ PAD_CFG_GPO(GPP_C22, 1, DEEP), /* EN_PP3300_DX_TOUCH */ -/* UART2_CTS# */ PAD_CFG_GPI(GPP_C23, 20K_PU, DEEP), /* PCH_WP */ +/* UART2_CTS# */ PAD_CFG_GPI_GPIO_DRIVER(GPP_C23, 20K_PU, + DEEP), /* PCH_WP */ /* GPP_D0 */ /* GPP_D1 */ /* GPP_D2 */ @@ -181,10 +187,10 @@ static const struct pad_config gpio_table[] = { * together with i2s0 signals. For default behavior of i2s make these * gpio inupts. */ -/* I2S2_SCLK */ PAD_CFG_GPI(GPP_F0, NONE, DEEP), -/* I2S2_SFRM */ PAD_CFG_GPI(GPP_F1, NONE, DEEP), -/* I2S2_TXD */ PAD_CFG_GPI(GPP_F2, NONE, DEEP), -/* I2S2_RXD */ PAD_CFG_GPI(GPP_F3, NONE, DEEP), +/* I2S2_SCLK */ PAD_CFG_GPI_GPIO_DRIVER(GPP_F0, NONE, DEEP), +/* I2S2_SFRM */ PAD_CFG_GPI_GPIO_DRIVER(GPP_F1, NONE, DEEP), +/* I2S2_TXD */ PAD_CFG_GPI_GPIO_DRIVER(GPP_F2, NONE, DEEP), +/* I2S2_RXD */ PAD_CFG_GPI_GPIO_DRIVER(GPP_F3, NONE, DEEP), /* I2C2_SDA */ /* GPP_F4 */ /* I2C2_SCL */ /* GPP_F5 */ /* I2C3_SDA */ /* GPP_F6 */ |