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authorPatrick Georgi <pgeorgi@chromium.org>2015-07-20 22:01:32 +0200
committerPatrick Georgi <pgeorgi@google.com>2015-07-21 20:16:12 +0200
commit406313d46d00c74dcfc80d4721bbd774d8b83911 (patch)
tree6c80eca37c7ee040a83c931bb20ffe0ad5bc89fd /src/mainboard/google/glados/spd
parent43bf00e594345412bd00d3e01001c4daf3c3b537 (diff)
google/glados: add new board
Change-Id: I0c196ff84484717c59c59d11bb7230b5920e0654 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/10997 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/glados/spd')
-rw-r--r--src/mainboard/google/glados/spd/Makefile.inc41
-rw-r--r--src/mainboard/google/glados/spd/empty.spd.hex16
-rw-r--r--src/mainboard/google/glados/spd/samsung_dimm_K4E6E304EE-EGCF.spd.hex16
-rw-r--r--src/mainboard/google/glados/spd/spd.c117
-rw-r--r--src/mainboard/google/glados/spd/spd.h36
5 files changed, 226 insertions, 0 deletions
diff --git a/src/mainboard/google/glados/spd/Makefile.inc b/src/mainboard/google/glados/spd/Makefile.inc
new file mode 100644
index 0000000000..d8c0c51109
--- /dev/null
+++ b/src/mainboard/google/glados/spd/Makefile.inc
@@ -0,0 +1,41 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2015 Google Inc.
+## Copyright (C) 2015 Intel Corporation
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc.
+##
+
+romstage-y += spd.c
+
+SPD_BIN = $(obj)/spd.bin
+
+# SPD data by index. No method for board identification yet
+SPD_SOURCES = samsung_dimm_K4E6E304EE-EGCF # 0
+SPD_SOURCES += empty # 1
+
+SPD_DEPS := $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/spd/$(f).spd.hex)
+
+# Include spd rom data
+$(SPD_BIN): $(SPD_DEPS)
+ for f in $+; \
+ do for c in $$(cat $$f | grep -v ^#); \
+ do printf $$(printf '\%o' 0x$$c); \
+ done; \
+ done > $@
+
+cbfs-files-y += spd.bin
+spd.bin-file := $(SPD_BIN)
+spd.bin-type := spd
diff --git a/src/mainboard/google/glados/spd/empty.spd.hex b/src/mainboard/google/glados/spd/empty.spd.hex
new file mode 100644
index 0000000000..9ec39f1ba4
--- /dev/null
+++ b/src/mainboard/google/glados/spd/empty.spd.hex
@@ -0,0 +1,16 @@
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/src/mainboard/google/glados/spd/samsung_dimm_K4E6E304EE-EGCF.spd.hex b/src/mainboard/google/glados/spd/samsung_dimm_K4E6E304EE-EGCF.spd.hex
new file mode 100644
index 0000000000..41ee49ac38
--- /dev/null
+++ b/src/mainboard/google/glados/spd/samsung_dimm_K4E6E304EE-EGCF.spd.hex
@@ -0,0 +1,16 @@
+91 20 F1 03 04 12 05 0A 03 11 01 08 09 00 50 05
+78 78 90 50 90 11 50 E0 10 04 3C 3C 01 90 00 00
+00 80 ca fa 00 00 00 A8 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 0F 11 02 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 80 CE 01 00 00 55 00 00 00 00 00
+4B 34 45 36 45 33 30 34 45 44 2D 45 47 43 45 20
+20 20 00 00 80 CE 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/src/mainboard/google/glados/spd/spd.c b/src/mainboard/google/glados/spd/spd.c
new file mode 100644
index 0000000000..5ee12f5f57
--- /dev/null
+++ b/src/mainboard/google/glados/spd/spd.c
@@ -0,0 +1,117 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Google Inc.
+ * Copyright (C) 2015 Intel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#include <arch/byteorder.h>
+#include <cbfs.h>
+#include <console/console.h>
+#include <string.h>
+#include <soc/gpio.h>
+#include <soc/pei_data.h>
+#include <soc/romstage.h>
+#include "spd.h"
+
+static void mainboard_print_spd_info(uint8_t spd[])
+{
+ const int spd_banks[8] = { 8, 16, 32, 64, -1, -1, -1, -1 };
+ const int spd_capmb[8] = { 1, 2, 4, 8, 16, 32, 64, 0 };
+ const int spd_rows[8] = { 12, 13, 14, 15, 16, -1, -1, -1 };
+ const int spd_cols[8] = { 9, 10, 11, 12, -1, -1, -1, -1 };
+ const int spd_ranks[8] = { 1, 2, 3, 4, -1, -1, -1, -1 };
+ const int spd_devw[8] = { 4, 8, 16, 32, -1, -1, -1, -1 };
+ const int spd_busw[8] = { 8, 16, 32, 64, -1, -1, -1, -1 };
+ char spd_name[SPD_PART_LEN+1] = { 0 };
+
+ int banks = spd_banks[(spd[SPD_DENSITY_BANKS] >> 4) & 7];
+ int capmb = spd_capmb[spd[SPD_DENSITY_BANKS] & 7] * 256;
+ int rows = spd_rows[(spd[SPD_ADDRESSING] >> 3) & 7];
+ int cols = spd_cols[spd[SPD_ADDRESSING] & 7];
+ int ranks = spd_ranks[(spd[SPD_ORGANIZATION] >> 3) & 7];
+ int devw = spd_devw[spd[SPD_ORGANIZATION] & 7];
+ int busw = spd_busw[spd[SPD_BUS_DEV_WIDTH] & 7];
+
+ /* Module type */
+ printk(BIOS_INFO, "SPD: module type is ");
+ switch (spd[SPD_DRAM_TYPE]) {
+ case SPD_DRAM_DDR3:
+ printk(BIOS_INFO, "DDR3\n");
+ break;
+ case SPD_DRAM_LPDDR3:
+ printk(BIOS_INFO, "LPDDR3\n");
+ break;
+ default:
+ printk(BIOS_INFO, "Unknown (%02x)\n", spd[SPD_DRAM_TYPE]);
+ break;
+ }
+
+ /* Module Part Number */
+ memcpy(spd_name, &spd[SPD_PART_OFF], SPD_PART_LEN);
+ spd_name[SPD_PART_LEN] = 0;
+ printk(BIOS_INFO, "SPD: module part is %s\n", spd_name);
+
+ printk(BIOS_INFO,
+ "SPD: banks %d, ranks %d, rows %d, columns %d, density %d Mb\n",
+ banks, ranks, rows, cols, capmb);
+ printk(BIOS_INFO, "SPD: device width %d bits, bus width %d bits\n",
+ devw, busw);
+
+ if (capmb > 0 && busw > 0 && devw > 0 && ranks > 0) {
+ /* SIZE = DENSITY / 8 * BUS_WIDTH / SDRAM_WIDTH * RANKS */
+ printk(BIOS_INFO, "SPD: module size is %u MB (per channel)\n",
+ capmb / 8 * busw / devw * ranks);
+ }
+}
+
+/* Copy SPD data for on-board memory */
+void mainboard_fill_spd_data(struct pei_data *pei_data)
+{
+ char *spd_file;
+ size_t spd_file_len;
+ int spd_index;
+
+ /* Load SPD data from CBFS */
+ spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD,
+ &spd_file_len);
+ if (!spd_file)
+ die("SPD data not found.");
+
+ /* make sure we have at least one SPD in the file. */
+ if (spd_file_len < SPD_LEN)
+ die("Missing SPD data.");
+
+ /* Add board SKU detection here. Currently we only support one. */
+ spd_index = 0;
+
+ /* Make sure we did not overrun the buffer */
+ if (spd_file_len < ((spd_index + 1) * SPD_LEN)) {
+ printk(BIOS_ERR, "SPD index override to 0 - old hardware?\n");
+ spd_index = 0;
+ }
+
+ /* Assume same memory in both channels */
+ spd_index *= SPD_LEN;
+ memcpy(pei_data->spd_data[0][0], spd_file + spd_index, SPD_LEN);
+ memcpy(pei_data->spd_data[1][0], spd_file + spd_index, SPD_LEN);
+
+ /* Make sure a valid SPD was found */
+ if (pei_data->spd_data[0][0][0] == 0)
+ die("Invalid SPD data.");
+
+ mainboard_print_spd_info(pei_data->spd_data[0][0]);
+}
diff --git a/src/mainboard/google/glados/spd/spd.h b/src/mainboard/google/glados/spd/spd.h
new file mode 100644
index 0000000000..abb964ed82
--- /dev/null
+++ b/src/mainboard/google/glados/spd/spd.h
@@ -0,0 +1,36 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Google Inc.
+ * Copyright (C) 2015 Intel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#ifndef MAINBOARD_SPD_H
+#define MAINBOARD_SPD_H
+
+#define SPD_LEN 256
+
+#define SPD_DRAM_TYPE 2
+#define SPD_DRAM_DDR3 0x0b
+#define SPD_DRAM_LPDDR3 0xf1
+#define SPD_DENSITY_BANKS 4
+#define SPD_ADDRESSING 5
+#define SPD_ORGANIZATION 7
+#define SPD_BUS_DEV_WIDTH 8
+#define SPD_PART_OFF 128
+#define SPD_PART_LEN 18
+
+#endif