diff options
| author | Varadarajan Narayanan <varada@codeaurora.org> | 2016-03-29 12:30:38 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2016-05-10 21:49:08 +0200 |
| commit | 8ce14a794825a09557e69d759049e03d7724f09e (patch) | |
| tree | 10c7cd792d1cdebe1016f5c6cdff4bcf6b223868 /src/mainboard/google/gale | |
| parent | 9f1e0c5428d18625f7e2fc1bc695f08c94d87c21 (diff) | |
soc/qualcomm/ipq40xx: Return NULL for cbmem_top if DRAM is not initialized
DRAM initialization on gale requires ipq blobs to be
loaded from cbfs. vboot_locator first checks cbmem_find to see if cbmem is
initialized and contains selected region info, else it falls back to
vboot work buffer.
Since cbmem_find calls into cbmem_top to identify the location of
cbmem area, board/chipset is expected to return NULL until the backing
store is ready, which in this case until DRAM is initialized in
romstage, return NULL for cbmem_top.
BUG=chrome-os-partner:49249
TEST=Able to compile and boot to depthcharge. Doesn't crash in
imd_handle_init_partial_recovery
BRANCH=none
Change-Id: Iaac24252ee4fb9f59d767730bf9dd68baa42a68f
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 4849c15dee2d3782ede4ee4157e432bd4d5602f0
Original-Change-Id: I3722b7ab5a6585a250138c828eb3d7919b0c1178
Original-Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/335425
Original-Commit-Ready: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://review.coreboot.org/14660
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/google/gale')
| -rw-r--r-- | src/mainboard/google/gale/mmu.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/gale/mmu.c b/src/mainboard/google/gale/mmu.c index 65797e7463..6c096a5bf4 100644 --- a/src/mainboard/google/gale/mmu.c +++ b/src/mainboard/google/gale/mmu.c @@ -12,6 +12,7 @@ #include <arch/cache.h> #include <symbols.h> +#include <soc/soc_services.h> #include "mmu.h" #define WIFI_IMEM_0_START ((uintptr_t)_wifi_imem_0 / KiB) @@ -33,6 +34,8 @@ void setup_dram_mappings(enum dram_state dram) mmu_config_range(DRAM_START, DRAM_SIZE, DCACHE_WRITEBACK); /* Map DMA memory */ mmu_config_range(DMA_START, DMA_SIZE, DCACHE_OFF); + /* Mark cbmem backing store as ready. */ + ipq_cbmem_backing_store_ready(); } else { mmu_disable_range(DRAM_START, DRAM_SIZE); /* Map DMA memory */ |