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author | David Wu <david_wu@quanta.corp-partner.google.com> | 2021-10-20 10:17:40 +0800 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2021-10-21 20:05:34 +0000 |
commit | e2c6d9c7cb7973cd1177184ac36153e1667386a0 (patch) | |
tree | 6bd85a6f0e433627ba4be58efa7764a69b5cea1d /src/mainboard/google/gale/chromeos.c | |
parent | 48bd8577895bdd0ff86f22010a74e13ffa620425 (diff) |
mb/google/brya/var/brask: Correct SSD power sequence
M.2 spec describes PERST# should be sequenced after power enable.
BUG=b:197385770
TEST=emerge-brask coreboot and verify it builds without error.
Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com>
Change-Id: Ia7e5c7b1a2194d53d98865d33cf1bc6111572876
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58463
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/gale/chromeos.c')
0 files changed, 0 insertions, 0 deletions