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author | Jacob Garber <jgarber1@ualberta.ca> | 2019-07-17 17:12:50 -0600 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2019-07-19 10:01:50 +0000 |
commit | 52f3bd158a2edf92ec163912ee6b4053f976c636 (patch) | |
tree | 663df3067ba02df9b8c5704c6a182e072a6ab744 /src/mainboard/google/foster/chromeos.c | |
parent | d92137adaba2898c86d696859c7c33f0a3bd7cbb (diff) |
sb/amd/sb800: Remove bit shift that does nothing
This bit shift attempts to set bits 8 and 9 of the byte variable (counting
from 0). However, as the name suggests, this variable is only 8 bits
wide, so the shift does nothing. Reading section 7.5 of the
AMD SB800-Series Southbridges Register Programming Requirements manual,
bits 8 and 9 are already set by default, so we can remove the bit shift.
(Alternatively, we could try setting the corresponding bits one byte
higher in 0xF1 if needed.)
Change-Id: I645236441e02925ee01339378d213cb343027363
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Found-by: Coverity CID 1229582
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34395
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/google/foster/chromeos.c')
0 files changed, 0 insertions, 0 deletions