mb/google/fizz/variants/karma: Clear GPP_B4 when entering S5

Set GPP_B4 to low in S5 to meet touch panel power sequence

BUG=b:124197348
BRANCH=master
TEST=Verify GPP_B4 is low.

Change-Id: I65deb33a45fdc0c0ce64deaa29c2790029dc1d12
Signed-off-by: David Wu <David_Wu@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/29796
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: David Wu <david_wu@quanta.corp-partner.google.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>

3 files changed, 32 insertions, 0 deletions

diff --git a/src/mainboard/google/fizz/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/fizz/variants/baseboard/include/baseboard/variants.h
index 50e7ee37c3..40dfeebc23 100644
--- a/src/mainboard/google/fizz/variants/baseboard/include/baseboard/variants.h
+++ b/src/mainboard/google/fizz/variants/baseboard/include/baseboard/variants.h
@@ -29,6 +29,8 @@ const struct pad_config *variant_early_gpio_table(size_t *num);
 
 const struct cros_gpio *variant_cros_gpios(size_t *num);
 
+void variant_smi_sleep(u8 slp_typ);
+
 struct nhlt;
 void variant_nhlt_init(struct nhlt *nhlt);
 void variant_nhlt_oem_overrides(const char **oem_id, const char **oem_table_id,
diff --git a/src/mainboard/google/fizz/variants/karma/Makefile.inc b/src/mainboard/google/fizz/variants/karma/Makefile.inc
index 0ad298b5f4..747552267d 100644
--- a/src/mainboard/google/fizz/variants/karma/Makefile.inc
+++ b/src/mainboard/google/fizz/variants/karma/Makefile.inc
@@ -2,3 +2,5 @@ bootblock-y += gpio.c
 
 ramstage-y += gpio.c
 ramstage-y += nhlt.c
+
+smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
diff --git a/src/mainboard/google/fizz/variants/karma/smihandler.c b/src/mainboard/google/fizz/variants/karma/smihandler.c
new file mode 100644
index 0000000000..1bfae4dfe7
--- /dev/null
+++ b/src/mainboard/google/fizz/variants/karma/smihandler.c
@@ -0,0 +1,28 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2018 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/acpi.h>
+#include <baseboard/variants.h>
+#include <gpio.h>
+
+#define TS_ENABLE	GPP_B4
+
+void variant_smi_sleep(u8 slp_typ)
+{
+	if (slp_typ == ACPI_S5) {
+		/* Set TS to disable */
+		gpio_set(TS_ENABLE, 0);
+	}
+}