summaryrefslogtreecommitdiff
path: root/src/mainboard/google/fizz/devicetree.cb
diff options
context:
space:
mode:
authorli feng <li1.feng@intel.com>2018-05-24 14:27:58 -0700
committerPatrick Georgi <pgeorgi@google.com>2018-07-11 10:48:12 +0000
commit3130a93bfa953011fed7429b17d3727abd3b4100 (patch)
treea563b2709eb63992ffee36733a12bb509846541f /src/mainboard/google/fizz/devicetree.cb
parent0738d2a00ddadbdd58708ab57189311750cf84f5 (diff)
skylake: Remove "IshEnable"
Remove "IshEnable" from soc_intel_skylake_config since it's not used anymore. Enable/disable ISH by checking if ISH device is turned on or not. Refer to https://review.coreboot.org/#/c/coreboot/+/26485/. BUG=b:79244403 BRANCH=none TEST=Built. Change-Id: I4d2889af118659852431c87cb516fd19b577efc5 Signed-off-by: li feng <li1.feng@intel.com> Reviewed-on: https://review.coreboot.org/26521 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google/fizz/devicetree.cb')
-rw-r--r--src/mainboard/google/fizz/devicetree.cb1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/google/fizz/devicetree.cb b/src/mainboard/google/fizz/devicetree.cb
index 0ac403efa5..281d65ce87 100644
--- a/src/mainboard/google/fizz/devicetree.cb
+++ b/src/mainboard/google/fizz/devicetree.cb
@@ -73,7 +73,6 @@ chip soc/intel/skylake
register "ScsEmmcEnabled" = "0"
register "ScsEmmcHs400Enabled" = "0"
register "ScsSdCardEnabled" = "2"
- register "IshEnable" = "0"
register "PttSwitch" = "0"
register "InternalGfx" = "1"
register "SkipExtGfxScan" = "1"