diff options
| author | Jayvik Desai <jayvik@google.com> | 2024-11-21 04:38:48 +0530 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2024-11-28 09:04:41 +0000 |
| commit | c679ab12b119a351cb078c55edd3e771cc8389ca (patch) | |
| tree | 730b23cfb2ab73b1aec1185e5d788b5d966cacec /src/mainboard/google/fatcat/variants | |
| parent | a07d4f54121e4f355f56f0307c6441e914d4578c (diff) | |
mb/google/fatcat: Adjust EC host command range for fatcat_ish variant
Adjusts the EC host command range for the fatcat_ish variant
to 0x800-0x807 & 0x200-0x20f.
This change is necessary because the microchip EC used on the Fatcat
board has a smaller host command range than the ITE/Nuvoton ECs used
on other Fatcat variants.
without this patch:
[SPEW ] LPC: Trying to open IO window from 800 size 8
[ERROR] LPC: Cannot open IO window: 800 size 8
[ERROR] No more IO windows
with this patch:
[SPEW ] LPC: Trying to open IO window from 800 size 8
BUG=b:370984186
TEST=Able to build fatcat/fatcat_ish w/o any error.
Change-Id: I0d726d60d2a15d2dfaff35f570de479fdc6d15aa
Signed-off-by: Jayvik Desai <jayvik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85221
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Pranava Y N <pranavayn@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Diffstat (limited to 'src/mainboard/google/fatcat/variants')
| -rw-r--r-- | src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb b/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb index a81f35e52c..c4e2276805 100644 --- a/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb +++ b/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb @@ -4,11 +4,11 @@ chip soc/intel/pantherlake register "pmc_gpe0_dw1" = "GPP_D" register "pmc_gpe0_dw2" = "GPP_E" - # For Fatcat (with microchip EC): + # For Fatcat variants with microchip EC: # EC host command ranges are in 0x800-0x807 & 0x200-0x20f - # For other Fatcat variants (with ITE/Nuvoton EC): + # For Fatcat variants with ITE/Nuvoton EC: # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f - register "gen1_dec" = "CONFIG(BOARD_GOOGLE_FATCAT) ? 0x00040801 : 0x00fc0801" + register "gen1_dec" = "CONFIG(BOARD_GOOGLE_FATCAT) || CONFIG(BOARD_GOOGLE_FATCATISH) ? 0x00040801 : 0x00fc0801" register "gen2_dec" = "0x000c0201" # EC memory map range is 0x900-0x9ff register "gen3_dec" = "0x00fc0901" |