diff options
author | Subrata Banik <subratabanik@google.com> | 2024-06-25 00:17:56 +0530 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2024-06-26 22:30:42 +0000 |
commit | 3aea34a9933f7884a2c08b9611f7b3ff9d791b1d (patch) | |
tree | 4de5afb69b07e9db7db5ef700a38d8fdded20ff2 /src/mainboard/google/fatcat/mainboard.c | |
parent | f3aaa0e1539c16a3a26a769110ec1aca458ab410 (diff) |
mb/google/fatcat: Add minimal code support for fatcat
This patch adds initial code block required to build google/fatcat
board with Intel Meteor Lake Silicon. Later after the initial board
power-on is successful, we shall switch to Panther Lake silicon to
build the google/fatcat reference design.
BUG=b:347669091
TEST=Able to build the google/fatcat and able to hit power-on reset
using Intel Meteor Lake SoC platform.
Change-Id: Iad78aec51b2f0f240991c9c35842764a60be988e
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83197
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/mainboard/google/fatcat/mainboard.c')
-rw-r--r-- | src/mainboard/google/fatcat/mainboard.c | 75 |
1 files changed, 75 insertions, 0 deletions
diff --git a/src/mainboard/google/fatcat/mainboard.c b/src/mainboard/google/fatcat/mainboard.c new file mode 100644 index 0000000000..107ee8d9b9 --- /dev/null +++ b/src/mainboard/google/fatcat/mainboard.c @@ -0,0 +1,75 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <acpi/acpi.h> +#include <acpi/acpigen.h> +#include <baseboard/gpio.h> +#include <baseboard/variants.h> +#include <device/device.h> +#include <ec/ec.h> +#include <soc/ramstage.h> +#include <stdio.h> +#include <stdlib.h> +#include <vendorcode/google/chromeos/chromeos.h> + +void __weak fw_config_gpio_padbased_override(struct pad_config *padbased_table) +{ + /* default implementation does nothing */ +} + +void mainboard_update_soc_chip_config(struct soc_intel_meteorlake_config *config) +{ + variant_update_soc_chip_config(config); +} + +__weak void variant_update_soc_chip_config(struct soc_intel_meteorlake_config *config) +{ + /* default implementation does nothing */ +} + +static void mainboard_init(void *chip_info) +{ + struct pad_config *padbased_table; + const struct pad_config *base_pads; + size_t base_num; + + padbased_table = new_padbased_table(); + base_pads = variant_gpio_table(&base_num); + gpio_padbased_override(padbased_table, base_pads, base_num); + fw_config_gpio_padbased_override(padbased_table); + gpio_configure_pads_with_padbased(padbased_table); + free(padbased_table); + baseboard_devtree_update(); +} + +void __weak baseboard_devtree_update(void) +{ + /* Override dev tree settings per baseboard */ +} + +void __weak variant_generate_s0ix_hook(enum s0ix_entry entry) +{ + /* Add board-specific MS0X entries */ + /* + if (s0ix_entry == S0IX_ENTRY) { + implement variant operations here + } + if (s0ix_entry == S0IX_EXIT) { + implement variant operations here + } + */ +} + +static void mainboard_dev_init(struct device *dev) +{ + mainboard_ec_init(); +} + +static void mainboard_enable(struct device *dev) +{ + dev->ops->init = mainboard_dev_init; +} + +struct chip_operations mainboard_ops = { + .init = mainboard_init, + .enable_dev = mainboard_enable, +}; |