mb/google/fatcat: Add Panther Lake SOC support

- This patch update the original google/fatcat support added
  with Meteor Lake support as a workaround.
- Add initial support to build google/fatcat for Panther Lake SOC
- Add soc acpi file entry in mainboard dsdt.asl

BUG=b:348678529
TEST=Build google fatcat board

Change-Id: I914f73ff06bfb801fc319b45b23d7ce4cb7a6d5e
Signed-off-by: Saurabh Mishra <mishra.saurabh@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83419
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 23 insertions, 12 deletions

diff --git a/src/mainboard/google/fatcat/Kconfig b/src/mainboard/google/fatcat/Kconfig
index cf4233a0d3..d2c501938e 100644
--- a/src/mainboard/google/fatcat/Kconfig
+++ b/src/mainboard/google/fatcat/Kconfig
@@ -3,36 +3,51 @@
 config BOARD_GOOGLE_FATCAT_COMMON
 	def_bool n
 	select BOARD_ROMSIZE_KB_32768
+	select DRIVERS_I2C_GENERIC
+	select DRIVERS_I2C_HID
+	select DRIVERS_INTEL_MIPI_CAMERA
+	select DRIVERS_INTEL_PMC
+	select DRIVERS_INTEL_SOUNDWIRE
+	select DRIVERS_SOUNDWIRE_ALC722
 	select DRIVERS_SPI_ACPI
+	select DUMP_SMBIOS_TYPE17
+	select EC_ACPI
 	select EC_GOOGLE_CHROMEEC
 	select EC_GOOGLE_CHROMEEC_BOARDID
 	select EC_GOOGLE_CHROMEEC_ESPI
+	select EC_GOOGLE_CHROMEEC_MEC
 	select EC_GOOGLE_CHROMEEC_SKUID
 	select FW_CONFIG
 	select FW_CONFIG_SOURCE_CHROMEEC_CBI
+	select GENERATE_SMBIOS_TABLES
 	select GOOGLE_SMBIOS_MAINBOARD_VERSION
+	select HAVE_ACPI_RESUME
 	select HAVE_ACPI_TABLES
+	select HAVE_SPD_IN_CBFS
 	select I2C_TPM
 	select INTEL_LPSS_UART_FOR_CONSOLE
 	select MAINBOARD_DISABLE_STAGE_CACHE
 	select MAINBOARD_HAS_TPM2
+	select MAINBOARD_USES_IFD_EC_REGION
 	select MB_COMPRESS_RAMSTAGE_LZ4
 	select PMC_IPC_ACPI_INTERFACE
-	select SOC_INTEL_COMMON_BLOCK_VARIANT_POWER_LIMIT
 	select SOC_INTEL_CSE_LITE_SKU
 	select SOC_INTEL_CSE_PRE_CPU_RESET_TELEMETRY_V2
 	select SOC_INTEL_CSE_SEND_EOP_ASYNC
 	select SOC_INTEL_PANTHERLAKE_U_H
+	select SOC_INTEL_TCSS_USE_PDC_PMC_USBC_MUX_CONFIGURATION
 
 config BOARD_GOOGLE_BASEBOARD_FATCAT
 	def_bool n
 	select BOARD_GOOGLE_FATCAT_COMMON
 	select CHROMEOS_WIFI_SAR if CHROMEOS
+	select DRIVERS_INTEL_USB4_RETIMER
 	select HAVE_SLP_S0_GATE
 	select MAINBOARD_HAS_CHROMEOS
 	select MEMORY_SOLDERDOWN
 	select SOC_INTEL_COMMON_BLOCK_HDA_VERB
 	select SOC_INTEL_IOE_DIE_SUPPORT
+	select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES
 	select SYSTEM_TYPE_LAPTOP
 	select TPM_GOOGLE_TI50
 
@@ -42,8 +57,6 @@ config BOARD_GOOGLE_MODEL_FATCAT
 
 config BOARD_GOOGLE_FATCAT
 	select BOARD_GOOGLE_MODEL_FATCAT
-	select HAVE_X86_64_SUPPORT
-	select USE_X86_64_SUPPORT
 
 if BOARD_GOOGLE_FATCAT_COMMON
 
@@ -53,8 +66,8 @@ config BASEBOARD_DIR
 
 config CHROMEOS
 	select EC_GOOGLE_CHROMEEC_SWITCHES
+	select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC
 	select GBB_FLAG_FORCE_DEV_BOOT_USB
-	select GBB_FLAG_FORCE_DEV_SWITCH_ON
 	select GBB_FLAG_FORCE_MANUAL_RECOVERY
 	select HAS_RECOVERY_MRC_CACHE
 
@@ -72,14 +85,13 @@ config DEVICETREE
 config DIMM_SPD_SIZE
 	default 512
 
-# FIXME: update below code as per board schematics
 config DRIVER_TPM_I2C_ADDR
 	hex
-	default 0x0
+	default 0x50
 
 config DRIVER_TPM_I2C_BUS
 	hex
-	default 0x0
+	default 0x03
 
 config FMDFILE
 	default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/chromeos-debug-fsp.fmd" if CHROMEOS && BUILDING_WITH_DEBUG_FSP
@@ -103,13 +115,9 @@ config MEMORY_SOLDERDOWN
 	select CHROMEOS_DRAM_PART_NUMBER_IN_CBI if CHROMEOS
 	select HAVE_SPD_IN_CBFS
 
-config OVERRIDE_DEVICETREE
-	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
-
-# FIXME: update as per board schematics
 config TPM_TIS_ACPI_INTERRUPT
 	int
-	default 0
+	default 47   # GPE0_DW1_15 (GPP_D15)
 
 # FIXME: update as per board schematics
 config UART_FOR_CONSOLE
@@ -123,6 +131,9 @@ config VARIANT_DIR
 	string
 	default "fatcat" if BOARD_GOOGLE_MODEL_FATCAT
 
+config OVERRIDE_DEVICETREE
+	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
+
 config VBOOT
 	select VBOOT_LID_SWITCH