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authorPatrick Rudolph <siro@das-labor.org>2016-02-06 18:07:59 +0100
committerMartin Roth <martinroth@google.com>2016-02-23 00:28:06 +0100
commit273a8dca1f7896c73b812ecc2c6cd2572ac51d6a (patch)
treea086a9e33bcef9c6490c6cc706a5aef79651f3b5 /src/mainboard/google/falco
parent9a4881a783fa1edc730dc484bb2c293d92e45823 (diff)
southbridge/intel/lynxpoint: Use common gpio.c
Use shared gpio code from common folder, except for INTEL_LYNXPOINT_LP, which has it's own gpio code. Needs test on real hardware ! Change-Id: Iccc6d254bafb927b6470704cec7c9dd7528e2c68 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/13615 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/google/falco')
-rw-r--r--src/mainboard/google/falco/chromeos.c1
-rw-r--r--src/mainboard/google/falco/smihandler.c1
2 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/falco/chromeos.c b/src/mainboard/google/falco/chromeos.c
index a7d96a8562..f0e6a5aa85 100644
--- a/src/mainboard/google/falco/chromeos.c
+++ b/src/mainboard/google/falco/chromeos.c
@@ -19,6 +19,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <southbridge/intel/lynxpoint/pch.h>
+#include <southbridge/intel/common/gpio.h>
#if CONFIG_EC_GOOGLE_CHROMEEC
#include "ec.h"
diff --git a/src/mainboard/google/falco/smihandler.c b/src/mainboard/google/falco/smihandler.c
index c1b3fcf001..6f17e40240 100644
--- a/src/mainboard/google/falco/smihandler.c
+++ b/src/mainboard/google/falco/smihandler.c
@@ -19,6 +19,7 @@
#include <cpu/x86/smm.h>
#include <southbridge/intel/lynxpoint/nvs.h>
#include <southbridge/intel/lynxpoint/pch.h>
+#include <southbridge/intel/common/gpio.h>
#include <southbridge/intel/lynxpoint/me.h>
#include <northbridge/intel/haswell/haswell.h>
#include <cpu/intel/haswell/haswell.h>