diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2013-05-22 16:31:09 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-11-25 23:37:48 +0100 |
| commit | 5290f71569d1bf8b6fa80d34f4b176407082fec8 (patch) | |
| tree | e00fc5374ae6dd041745cf6e4a7121185b46087d /src/mainboard/google/falco/Kconfig | |
| parent | 619eca0685ef2c7777ff0d741730a29af5db05a0 (diff) | |
falco: Initial mainboard commit
- Only the first two DIMM SPDs are specified so far
- GPIO map is updated
- iSSD power sequencing removed
- USB port map updated
Change-Id: I4172460d3b075bfd5bb22013a6225cf0e8f95b9c
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/56329
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4184
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/google/falco/Kconfig')
| -rw-r--r-- | src/mainboard/google/falco/Kconfig | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/src/mainboard/google/falco/Kconfig b/src/mainboard/google/falco/Kconfig new file mode 100644 index 0000000000..068e7f1d50 --- /dev/null +++ b/src/mainboard/google/falco/Kconfig @@ -0,0 +1,51 @@ +if BOARD_GOOGLE_FALCO + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select ARCH_X86 + select CPU_INTEL_SOCKET_RPGA989 + select NORTHBRIDGE_INTEL_HASWELL + select SOUTHBRIDGE_INTEL_LYNXPOINT + select INTEL_LYNXPOINT_LP + select BOARD_ROMSIZE_KB_8192 + select EC_GOOGLE_CHROMEEC + select HAVE_ACPI_TABLES + select HAVE_OPTION_TABLE + select HAVE_ACPI_RESUME + select MMCONF_SUPPORT + select HAVE_SMI_HANDLER + select CHROMEOS + select EXTERNAL_MRC_BLOB + select CACHE_ROM + select MARK_GRAPHICS_MEM_WRCOMB + select MONOTONIC_TIMER_MSR + +config VBOOT_RAMSTAGE_INDEX + hex + default 0x2 + +config MAINBOARD_DIR + string + default google/falco + +config MAINBOARD_PART_NUMBER + string + default "Falco" + +config MMCONF_BASE_ADDRESS + hex + default 0xf0000000 + +config IRQ_SLOT_COUNT + int + default 18 + +config MAX_CPUS + int + default 8 + +config VGA_BIOS_FILE + string + default "pci8086,0166.rom" + +endif |