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authorDuncan Laurie <dlaurie@chromium.org>2016-10-28 09:13:52 -0700
committerDuncan Laurie <dlaurie@chromium.org>2016-11-01 22:54:25 +0100
commit81485d2763f461ce28dad2ffc43441c4bae570dd (patch)
treea41429a0cf17fef0dc7520f69265708ed47ba932 /src/mainboard/google/eve/smihandler.c
parentec7293652af797b2595bec396bae8cd625afbf8e (diff)
google/eve: Add new board
Add the eve board files using kabylake and FSP 2.0. BUG=chrome-os-partner:58666 TEST=build and boot on eve board Change-Id: I7ca71fe052608d710ee65d078df7af7b55d382bc Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/17177 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/google/eve/smihandler.c')
-rw-r--r--src/mainboard/google/eve/smihandler.c48
1 files changed, 48 insertions, 0 deletions
diff --git a/src/mainboard/google/eve/smihandler.c b/src/mainboard/google/eve/smihandler.c
new file mode 100644
index 0000000000..879131c220
--- /dev/null
+++ b/src/mainboard/google/eve/smihandler.c
@@ -0,0 +1,48 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/io.h>
+#include <cpu/x86/smm.h>
+#include <ec/google/chromeec/smm.h>
+#include <gpio.h>
+#include <soc/smm.h>
+#include "ec.h"
+#include "gpio.h"
+
+void mainboard_smi_espi_handler(void)
+{
+ chromeec_smi_process_events();
+}
+
+static void mainboard_gpio_smi_sleep(u8 slp_typ)
+{
+ /* Power down the rails on any sleep type */
+ gpio_set(EN_PP3300_DX_TOUCH, 0);
+ gpio_set(EN_PP3300_DX_CAM, 0);
+}
+
+void mainboard_smi_sleep(u8 slp_typ)
+{
+ chromeec_smi_sleep(slp_typ, MAINBOARD_EC_S3_WAKE_EVENTS,
+ MAINBOARD_EC_S5_WAKE_EVENTS);
+ mainboard_gpio_smi_sleep(slp_typ);
+}
+
+int mainboard_smi_apmc(u8 apmc)
+{
+ chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS,
+ MAINBOARD_EC_SMI_EVENTS);
+ return 0;
+}