diff options
author | Duncan Laurie <dlaurie@chromium.org> | 2016-10-28 09:13:52 -0700 |
---|---|---|
committer | Duncan Laurie <dlaurie@chromium.org> | 2016-11-01 22:54:25 +0100 |
commit | 81485d2763f461ce28dad2ffc43441c4bae570dd (patch) | |
tree | a41429a0cf17fef0dc7520f69265708ed47ba932 /src/mainboard/google/eve/ramstage.c | |
parent | ec7293652af797b2595bec396bae8cd625afbf8e (diff) |
google/eve: Add new board
Add the eve board files using kabylake and FSP 2.0.
BUG=chrome-os-partner:58666
TEST=build and boot on eve board
Change-Id: I7ca71fe052608d710ee65d078df7af7b55d382bc
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/17177
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/google/eve/ramstage.c')
-rw-r--r-- | src/mainboard/google/eve/ramstage.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/src/mainboard/google/eve/ramstage.c b/src/mainboard/google/eve/ramstage.c new file mode 100644 index 0000000000..be3676a1f2 --- /dev/null +++ b/src/mainboard/google/eve/ramstage.c @@ -0,0 +1,23 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Google Inc. + * Copyright (C) 2016 Intel Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <soc/ramstage.h> +#include "gpio.h" + +void mainboard_silicon_init_params(FSP_SIL_UPD *params) +{ + gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table)); +} |