summaryrefslogtreecommitdiff
path: root/src/mainboard/google/drallion
diff options
context:
space:
mode:
authorMatt DeVillier <matt.devillier@gmail.com>2024-01-19 20:40:55 -0600
committerFelix Singer <service+coreboot-gerrit@felixsinger.de>2024-02-13 19:02:48 +0000
commit5eb6e55257c6e349dfe65888ca9962028f12e021 (patch)
tree3d74ff295c1094eb7cfe8362bf31ffde4514aa40 /src/mainboard/google/drallion
parent4f86e1da8184738a29f11fe6713799cc2254305d (diff)
mb/google/drallion: Use name 'LCD0' for internal panel output
The GMA driver generates the brightness controls expecting the name LCD0, so we need to use it here as well so that the DSDT and SSDT parts match. TEST=build/boot Win11 on google/drallion, verify brightness controls are functional. Change-Id: I6fbdd0c5606ec8f2c497e85bf46d388957f15fa5 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80175 Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <ericllai@google.com>
Diffstat (limited to 'src/mainboard/google/drallion')
-rw-r--r--src/mainboard/google/drallion/variants/drallion/devicetree.cb2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/drallion/variants/drallion/devicetree.cb b/src/mainboard/google/drallion/variants/drallion/devicetree.cb
index 950dab9c19..9fe0a691e7 100644
--- a/src/mainboard/google/drallion/variants/drallion/devicetree.cb
+++ b/src/mainboard/google/drallion/variants/drallion/devicetree.cb
@@ -223,7 +223,7 @@ chip soc/intel/cannonlake
register "gfx" = "GMA_DEFAULT_PANEL(0)"
chip drivers/gfx/generic
register "device_count" = "1"
- register "device[0].name" = ""LCD""
+ register "device[0].name" = ""LCD0""
# Address is set following the ACPI spec section A.3.2
# for an internal panel on the first port of the graphics chip
register "device[0].addr" = "0x80010400"