diff options
| author | Bora Guvendik <bora.guvendik@intel.com> | 2019-10-09 14:18:38 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-10-16 14:13:07 +0000 |
| commit | 73ffd6acdf468f7d15a4927d30883e45f4706d6f (patch) | |
| tree | ea0fc7454fb10d8c0b3a36af4eb51ab995b8e9e3 /src/mainboard/google/drallion/variants | |
| parent | 469af0348e2e61112ee98007d41aaaa43135a776 (diff) | |
mb/google/drallion: Add new SPD file for drallion
Add the SPD data for MT40A1G16KD-062E:E
BUG=b:139397313
TEST=Compile successfully.
Change-Id: I3d1ae9269ff3129845a7f53dbacbab6e1b66b6d5
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35945
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Diffstat (limited to 'src/mainboard/google/drallion/variants')
| -rw-r--r-- | src/mainboard/google/drallion/variants/drallion/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/mainboard/google/drallion/variants/drallion/memory.c | 2 |
2 files changed, 2 insertions, 1 deletions
diff --git a/src/mainboard/google/drallion/variants/drallion/Makefile.inc b/src/mainboard/google/drallion/variants/drallion/Makefile.inc index ef3d54d185..ccbcb08da8 100644 --- a/src/mainboard/google/drallion/variants/drallion/Makefile.inc +++ b/src/mainboard/google/drallion/variants/drallion/Makefile.inc @@ -22,6 +22,7 @@ SPD_SOURCES += hynix_dimm_H5AN8G6NCJR-VKC # 0b10001 SPD_SOURCES += hynix_dimm_H5ANAG6NCMR-VKC # 0b11001 SPD_SOURCES += samsung_dimm_K4A8G165WC-BCTD # 0b10011 SPD_SOURCES += samsung_dimm_K4AAG165WB-MCTD # 0b11011 +SPD_SOURCES += micron_dimm_MT40A1G16KD-062EE # 0b11010 bootblock-y += gpio.c ramstage-y += gpio.c diff --git a/src/mainboard/google/drallion/variants/drallion/memory.c b/src/mainboard/google/drallion/variants/drallion/memory.c index 37d009adf9..9c4135dfdc 100644 --- a/src/mainboard/google/drallion/variants/drallion/memory.c +++ b/src/mainboard/google/drallion/variants/drallion/memory.c @@ -24,7 +24,7 @@ static const int spd_index[32] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 3, 6, 1, 0, 0, 0, - 0, 5, 0, 7, 2, 0, 0, 0 + 0, 5, 8, 7, 2, 0, 0, 0 }; const struct cnl_mb_cfg *get_variant_memory_cfg(struct cnl_mb_cfg *mem_cfg) |