diff options
| author | ravindr1 <ravindra@intel.com> | 2021-03-29 19:41:25 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-05-03 07:41:53 +0000 |
| commit | 745965763bb59055766a8f1a1662813387890cbb (patch) | |
| tree | afadecba3debd8570541a9574f344518de48d4b1 /src/mainboard/google/drallion/variants | |
| parent | a3f7debc89dda5cc42dbd36f64604015f22f2dbd (diff) | |
soc/intel/alderlake: Enable HWP CPPC support in CB
Kconfig change which enables the hwp cppc acpi support is to get the
maximum performance of each CPU to check and enable Intel Turbo Boost
Max Technology.
BUG=none
BRANCH=none
TEST=check GCPC and CPC generated in acpi tables for each CPU
Change-Id: I5d93774e8025466f1911cf77459910fe872bfcc8
Signed-off-by: ravindr1 <ravindra@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51795
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/drallion/variants')
0 files changed, 0 insertions, 0 deletions