diff options
author | Mike Wiitala <mwiitala@google.com> | 2019-12-12 13:44:44 -0700 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-12-16 09:36:40 +0000 |
commit | b7eb1097e5d38cbf7fd6ee6001cde264f1e74984 (patch) | |
tree | 1b29df3637ecd27d9f5c43565c05114126a59cc7 /src/mainboard/google/drallion/variants/arcada_cml/include/variant | |
parent | b320bc5e0e6863126b57166923f3e0fac96bbb0c (diff) |
mb/g/drallion: Remove Wilco 1.0 CML variants from drallion code
Remove the sarien_cml and arcada_cml subdirectories from the
drallion/variants directory.
BUG=b:140068267
TEST=./build_packages --board=drallion
Confirm that drallion still builds successfully.
BRANCH=none
Change-Id: I9648965ca222d4d68bf73738716ad1c93739b03f
Signed-off-by: Mike Wiitala <mwiitala@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37678
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Mathew King <mathewk@chromium.org>
Diffstat (limited to 'src/mainboard/google/drallion/variants/arcada_cml/include/variant')
6 files changed, 0 insertions, 419 deletions
diff --git a/src/mainboard/google/drallion/variants/arcada_cml/include/variant/acpi/dptf.asl b/src/mainboard/google/drallion/variants/arcada_cml/include/variant/acpi/dptf.asl deleted file mode 100644 index 73e1decc1b..0000000000 --- a/src/mainboard/google/drallion/variants/arcada_cml/include/variant/acpi/dptf.asl +++ /dev/null @@ -1,73 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2018 Google LLC - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#define DPTF_CPU_PASSIVE 98 -#define DPTF_CPU_CRITICAL 108 - -/* Skin Sensor for CPU VR temperature monitor */ -#define DPTF_TSR0_SENSOR_ID 1 -#define DPTF_TSR0_SENSOR_NAME "Skin" -#define DPTF_TSR0_PASSIVE 55 -#define DPTF_TSR0_CRITICAL 100 - -/* Memory Sensor for DDR temperature monitor */ -#define DPTF_TSR1_SENSOR_ID 2 -#define DPTF_TSR1_SENSOR_NAME "DDR" -#define DPTF_TSR1_PASSIVE 53 -#define DPTF_TSR1_CRITICAL 100 - -/* M.2 Sensor for Ambient temperature monitor */ -#define DPTF_TSR2_SENSOR_ID 3 -#define DPTF_TSR2_SENSOR_NAME "Ambient" -#define DPTF_TSR2_PASSIVE 38 -#define DPTF_TSR2_CRITICAL 93 - -#undef DPTF_ENABLE_FAN_CONTROL -#undef DPTF_ENABLE_CHARGER - -Name (DTRT, Package () { - /* CPU Throttle Effect on CPU */ - Package () { \_SB.PCI0.TCPU, \_SB.PCI0.TCPU, 500, 100, 0, 0, 0, 0 }, - - /* CPU Throttle Effect on Skin (TSR0) */ - Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR0, 400, 40, 0, 0, 0, 0 }, - - /* CPU Throttle Effect on DDR (TSR1) */ - Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR1, 300, 50, 2, 0, 0, 0 }, - - /* CPU Throttle Effect on Ambient (TSR2) */ - Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR2, 1000, 100, 1, 0, 0, 0 }, -}) - -Name (MPPC, Package () -{ - 0x2, /* Revision */ - Package () { /* Power Limit 1 */ - 0, /* PowerLimitIndex, 0 for Power Limit 1 */ - 3000, /* PowerLimitMinimum */ - 21000, /* PowerLimitMaximum */ - 28000, /* TimeWindowMinimum */ - 28000, /* TimeWindowMaximum */ - 100 /* StepSize */ - }, - Package () { /* Power Limit 2 */ - 1, /* PowerLimitIndex, 1 for Power Limit 2 */ - 15000, /* PowerLimitMinimum */ - 51000, /* PowerLimitMaximum */ - 28000, /* TimeWindowMinimum */ - 28000, /* TimeWindowMaximum */ - 100 /* StepSize */ - } -}) diff --git a/src/mainboard/google/drallion/variants/arcada_cml/include/variant/acpi/mainboard.asl b/src/mainboard/google/drallion/variants/arcada_cml/include/variant/acpi/mainboard.asl deleted file mode 100644 index 41121d28fe..0000000000 --- a/src/mainboard/google/drallion/variants/arcada_cml/include/variant/acpi/mainboard.asl +++ /dev/null @@ -1,44 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2019 Intel Corp. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#define CAM_EN GPP_B11 /* Active low */ -#define TS_PD GPP_E7 - -/* Method called from LPIT prior to enter s0ix state */ -Method (MS0X, 1) -{ - If (Arg0) { - /* Turn off camera power */ - \_SB.PCI0.STXS (CAM_EN) - } Else { - /* Turn on camera power */ - \_SB.PCI0.CTXS (CAM_EN) - } -} - -/* Method called from _PTS prior to enter sleep state */ -Method (MPTS, 1) -{ - \_SB.PCI0.LPCB.EC0.PTS (Arg0) - - /* Clear touch screen pd pin to avoid leakage */ - \_SB.PCI0.CTXS (TS_PD) -} - -/* Method called from _WAK prior to wakeup */ -Method (MWAK, 1) -{ - \_SB.PCI0.LPCB.EC0.WAK (Arg0) -} diff --git a/src/mainboard/google/drallion/variants/arcada_cml/include/variant/ec.h b/src/mainboard/google/drallion/variants/arcada_cml/include/variant/ec.h deleted file mode 100644 index 01a17b5f99..0000000000 --- a/src/mainboard/google/drallion/variants/arcada_cml/include/variant/ec.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2018 Google LLC - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef VARIANT_EC_H -#define VARIANT_EC_H - -#include <soc/gpe.h> -#include <soc/gpio.h> - -/* EC wake pin */ -#define EC_WAKE_PIN GPE0_DW1_12 - -/* eSPI virtual wire reporting */ -#define EC_SCI_GPI GPE0_ESPI - -/* Enable PS/2 keyboard */ -#define SIO_EC_ENABLE_PS2K - -/* Enable DPTF */ -#define EC_ENABLE_DPTF - -#endif diff --git a/src/mainboard/google/drallion/variants/arcada_cml/include/variant/gpio.h b/src/mainboard/google/drallion/variants/arcada_cml/include/variant/gpio.h deleted file mode 100644 index f7e0403e59..0000000000 --- a/src/mainboard/google/drallion/variants/arcada_cml/include/variant/gpio.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2018 Google LLC - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the - * GNU General Public License for more details. - */ - -#ifndef VARIANT_GPIO_H -#define VARIANT_GPIO_H - -#include <soc/gpe.h> -#include <soc/gpio.h> - -/* Flash Write Protect */ -#define GPIO_PCH_WP GPP_E15 - -/* Recovery mode */ -#define GPIO_REC_MODE GPP_E8 - -const struct pad_config *variant_gpio_table(size_t *num); -const struct pad_config *variant_early_gpio_table(size_t *num); - -struct cros_gpio; -const struct cros_gpio *variant_cros_gpios(size_t *num); - -#endif diff --git a/src/mainboard/google/drallion/variants/arcada_cml/include/variant/hda_verb.h b/src/mainboard/google/drallion/variants/arcada_cml/include/variant/hda_verb.h deleted file mode 100644 index 10fbaf13f5..0000000000 --- a/src/mainboard/google/drallion/variants/arcada_cml/include/variant/hda_verb.h +++ /dev/null @@ -1,209 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2018 Google LLC - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef MAINBOARD_HDA_VERB_H -#define MAINBOARD_HDA_VERB_H - -#include <device/azalia_device.h> - -const u32 cim_verb_data[] = { - /* coreboot specific header */ - 0x10ec0295, // Codec Vendor / Device ID: Realtek ALC3204 - 0xffffffff, // Subsystem ID - 0x0000002b, // Number of jacks (NID entries) - - /* Rest Codec First */ - AZALIA_RESET(0x1), - /* NID 0x01, HDA Codec Subsystem ID Verb Table */ - AZALIA_SUBVENDOR(0x0, 0x102808b6), - - /* Pin Widget Verb Table */ - AZALIA_PIN_CFG(0x0, 0x12, 0xb7a60130), - AZALIA_PIN_CFG(0x0, 0x13, 0x411111f0), - AZALIA_PIN_CFG(0x0, 0x14, 0x90170110), - AZALIA_PIN_CFG(0x0, 0x16, 0x40000000), - AZALIA_PIN_CFG(0x0, 0x17, 0x411111f0), - AZALIA_PIN_CFG(0x0, 0x18, 0x411111f0), - AZALIA_PIN_CFG(0x0, 0x19, 0x04a11030), - AZALIA_PIN_CFG(0x0, 0x1a, 0x411111f0), - AZALIA_PIN_CFG(0x0, 0x1b, 0x411111f0), - AZALIA_PIN_CFG(0x0, 0x1d, 0x40c00001), - AZALIA_PIN_CFG(0x0, 0x1e, 0x421212f2), - AZALIA_PIN_CFG(0x0, 0x21, 0x04211020), - - /* D reset */ - 0x0205003C, - 0x0204F254, - 0x0205003C, - 0x0204F214, - /* JD1 - 2port JD mode */ - 0x02050009, - 0x0204E003, - 0x0205000A, - 0x02047770, - /* Set TRS type-1 */ - 0x02050045, - 0x02045289, - 0x02050049, - 0x02040049, - /* Set TRS type-2 + Set UAJ Line2 vref(ALC3254) */ - 0x0205004A, - 0x0204A830, - 0x02050063, - 0x0204CF00, - /* NID 0x20 set class-D to 2W@4ohm (+12dB gain) - * + Set sine tone gain(0x34) */ - 0x02050038, - 0x02043909, - 0x05C50000, - 0x05C43482, - /* AGC-1 Disable + (Front Gain=0dB ) */ - 0x05D50006, - 0x05D44C50, - 0x05D50002, - 0x05D44004, - /* AGC-2 (Backt Boost Gain= -0.375dB ,Limiter = -3dB) */ - 0x05D50003, - 0x05D45E5E, - 0x05D50001, - 0x05D4D788, - /* AGC-3 + AGC Enable */ - 0x05D50009, - 0x05D451FF, - 0x05D50006, - 0x05D44E50, - /* HP-JD Enable +Nokia type */ - 0x0205004A, - 0x02042010, - 0x02050008, - 0x02046A0C, - /* EAPD set to verb-control + I2C Un-use+ DVDD3.3V */ - 0x02050010, - 0x02040020, - 0x02050034, - 0x0204A23D, - /* Class D silent detection Enable -84dB threshold */ - 0x02050030, - 0x02049000, - 0x02050037, - 0x0204FE15, - /* Disable EQ + set 250Hz 3rd High Pass filter */ - 0x05350000, - 0x0534203A, - 0x05350000, - 0x0534203A, - /* Left Channel-1 */ - 0x0535001d, - 0x05340800, - 0x0535001e, - 0x05340800, - /* Left Channel-2 */ - 0x05350003, - 0x05341EF8, - 0x05350004, - 0x05340000, - /* Left Channel-3 */ - 0x05350005, - 0x053403EE, - 0x05350006, - 0x0534FA60, - /* Left Channel-4 */ - 0x05350007, - 0x05341E10, - 0x05350008, - 0x05347B86, - /* Left Channel-5 */ - 0x05350009, - 0x053401F7, - 0x0535000A, - 0x05349FB6, - /* Left Channel-6 */ - 0x0535000B, - 0x05341C00, - 0x0535000C, - 0x05340000, - /* Left Channel-7 */ - 0x0535000D, - 0x05340200, - 0x0535000E, - 0x05340000, - /* Right Channel-1 */ - 0x05450000, - 0x05442000, - 0x0545001d, - 0x05440800, - /* Right Channel-2 */ - 0x0545001e, - 0x05440800, - 0x05450003, - 0x05441EF8, - /* Right Channel-3 */ - 0x05450004, - 0x05440000, - 0x05450005, - 0x054403EE, - /* Right Channel-4 */ - 0x05450006, - 0x0544FA60, - 0x05450007, - 0x05441E10, - /* Right Channel-5 */ - 0x05450008, - 0x05447B86, - 0x05450009, - 0x054401F7, - /* Right Channel-6 */ - 0x0545000A, - 0x05449FB6, - 0x0545000B, - 0x05441C00, - /* Right Channel-7 */ - 0x0545000C, - 0x05440000, - 0x0545000D, - 0x05440200, - /* Right Channel-8 + EQ Update & Enable */ - 0x0545000E, - 0x05440000, - 0x05350000, - 0x0534E03A, - /* Enable all Microphone */ - 0x0205000D, - 0x0204A023, - 0x0205000D, - 0x0204A023, - /* Enable Internal Speaker (NID14) */ - 0x0205000F, - 0x02040000, - 0x0205000F, - 0x02040000, -}; - -const u32 pc_beep_verbs[] = { - /* PCBeep pass through to NID14 for ePSA test-1 */ - 0x02050036, - 0x020477D7, - 0x0143B000, - 0x01470740, - /* PCBeep pass through to NID14 for ePSA test-2 */ - 0x01470C02, - 0x01470C02, - 0x01470C02, - 0x01470C02, -}; - -AZALIA_ARRAY_SIZES; - -#endif diff --git a/src/mainboard/google/drallion/variants/arcada_cml/include/variant/variant.h b/src/mainboard/google/drallion/variants/arcada_cml/include/variant/variant.h deleted file mode 100644 index da1189e14c..0000000000 --- a/src/mainboard/google/drallion/variants/arcada_cml/include/variant/variant.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2018 Google LLC - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef VARIANT_H -#define VARIANT_H - -/* Arcada is SKU ID 2 and 4 */ -#define VARIANT_SKU_ID 2 -#define VARIANT_SKU_NAME "sku2" -#define VARIANT_SKU_ID_SIGNED_EC 4 -#define VARIANT_SKU_NAME_SIGNED_EC "sku4" - -#endif |