aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/google/drallion/spd
diff options
context:
space:
mode:
authorEric Lai <ericr_lai@compal.corp-partner.google.com>2019-08-27 15:32:36 +0800
committerPatrick Georgi <pgeorgi@google.com>2019-08-28 09:19:53 +0000
commit65e4f7858e819cc4d5b277b1384bad127f46575c (patch)
tree28c9a7c067760445896228b1319d8175849a4c33 /src/mainboard/google/drallion/spd
parent02240b7a5e6d0202f58be6741ea9147704e54868 (diff)
mb/google/drallion: add dummy SPD file
Drallion will use soldered down memory. Add dummy spd file. BUG=b:139397313 BRANCH=N/A TEST=Build and check cbfs has the dummy spd.bin Change-Id: Ife59c2dd689d72b117f30e832a3ce7eed4fa4220 Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35113 Reviewed-by: Mathew King <mathewk@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/drallion/spd')
-rw-r--r--src/mainboard/google/drallion/spd/Makefile.inc34
-rw-r--r--src/mainboard/google/drallion/spd/empty_ddr4.spd.hex32
2 files changed, 66 insertions, 0 deletions
diff --git a/src/mainboard/google/drallion/spd/Makefile.inc b/src/mainboard/google/drallion/spd/Makefile.inc
new file mode 100644
index 0000000000..e35544bc7d
--- /dev/null
+++ b/src/mainboard/google/drallion/spd/Makefile.inc
@@ -0,0 +1,34 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2018 Intel Corporation.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+
+SPD_BIN = $(obj)/spd.bin
+
+ifeq ($(SPD_SOURCES),)
+ SPD_DEPS := $(error SPD_SOURCES is not set. Variant must provide this)
+else
+ SPD_DEPS := $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/spd/$(f).spd.hex)
+endif
+
+# Include spd ROM data
+$(SPD_BIN): $(SPD_DEPS)
+ for f in $+; \
+ do for c in $$(cat $$f | grep -v ^#); \
+ do printf $$(printf '\%o' 0x$$c); \
+ done; \
+ done > $@
+
+cbfs-files-y += spd.bin
+spd.bin-file := $(SPD_BIN)
+spd.bin-type := spd
diff --git a/src/mainboard/google/drallion/spd/empty_ddr4.spd.hex b/src/mainboard/google/drallion/spd/empty_ddr4.spd.hex
new file mode 100644
index 0000000000..67b46cd239
--- /dev/null
+++ b/src/mainboard/google/drallion/spd/empty_ddr4.spd.hex
@@ -0,0 +1,32 @@
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00