mb/google/drallion: Add new mainboard

Drallion is a new mainboard using Intel Comet Lake SOC. As a starting
point, I took mainboard/sarien as the reference code and modified WHL
to Comet Lake.

BUG=b:138098572
Test=compiles

Signed-off-by: Thejaswani Putta <thejaswani.putta@intel.com>
Change-Id: I541952a4ef337e7277a85f02d25979f12ec075c4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34497
Reviewed-by: Mathew King <mathewk@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 35 insertions, 0 deletions

diff --git a/src/mainboard/google/drallion/smihandler.c b/src/mainboard/google/drallion/smihandler.c
new file mode 100644
index 0000000000..0efcaa9ef1
--- /dev/null
+++ b/src/mainboard/google/drallion/smihandler.c
@@ -0,0 +1,35 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 Google LLC
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <cpu/x86/smm.h>
+#include <ec/google/wilco/smm.h>
+#include <soc/smm.h>
+#include <variant/ec.h>
+
+void mainboard_smi_espi_handler(void)
+{
+	wilco_ec_smi_espi();
+}
+
+void mainboard_smi_sleep(u8 slp_typ)
+{
+	wilco_ec_smi_sleep(slp_typ);
+}
+
+int mainboard_smi_apmc(u8 apmc)
+{
+	wilco_ec_smi_apmc(apmc);
+	return 0;
+}