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authorEric Lai <ericr_lai@compal.corp-partner.google.com>2020-02-14 15:50:05 +0800
committerPatrick Georgi <pgeorgi@google.com>2020-02-17 15:40:01 +0000
commit4714100c49663cee47cd37dbfe31e6ae11c4b6b4 (patch)
tree519e6a71dbc0bfd37564f8a87be4b5ac692b16fc /src/mainboard/google/drallion/ramstage.c
parent4e3cb9588bf15b416698484faad8454482ceae41 (diff)
mb/google/drallion: Correct USB3 OC pin configuration
USB3 OC pin is configured for the wrong pin. Follow HW circuit (schematics) to set it correctly. BUG=b:147869924 TEST=USB function works well and OC function is corresponds to the right port. Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: I61234a2054ab52fa508482d3dd0f94b13f96a5c9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/38885 Reviewed-by: John Su <john_su@compal.corp-partner.google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/drallion/ramstage.c')
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