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authorEric Lai <ericr_lai@compal.corp-partner.google.com>2020-06-01 14:37:47 +0800
committerTim Wawrzynczak <twawrzynczak@chromium.org>2020-06-03 01:29:37 +0000
commit5f86b0b7e3153240cfee3dbaade0428c8055ba5b (patch)
treeef5ca343a3cb24a796e2b92d18cae757411bda21 /src/mainboard/google/deltaur
parentebeaad9298f5b8df022ac77089a5c15dac6e069a (diff)
mb/google/deltaur: Change H1 I2C speed to FAST
H1 is stable after HW rework. Connect +3.3V_ALW_PCH with +3.3V_PRIM. Therefore change I2C speed back to FAST. BUG=b:154885320 TEST=Check H1 I2C speed is 375kHz by scope. And no error message in cbmem and kernel log. Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: If58721039d90514a17f024e6b432f3a5226440e7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/41964 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Bora Guvendik <bora.guvendik@intel.com>
Diffstat (limited to 'src/mainboard/google/deltaur')
-rw-r--r--src/mainboard/google/deltaur/variants/baseboard/devicetree.cb2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb b/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb
index 14516a01bb..1af83259be 100644
--- a/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb
@@ -89,7 +89,7 @@ chip soc/intel/tigerlake
.speed = I2C_SPEED_FAST,
},
.i2c[3] = {
- .speed = I2C_SPEED_STANDARD,
+ .speed = I2C_SPEED_FAST,
.early_init = 1,
},
.i2c[5] = {